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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 14:02:52 +02:00
llvm-mirror/test/CodeGen
Dan Gohman 9c3961aabe [WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.
Move RegStackify after coalescing and teach it to use LiveIntervals instead
of depending on SSA form. This avoids a problem where a register in a COPY
instruction is stackified and then subsequently coalesced with a register
that is not stackified.

This also puts it after the scheduler, which allows us to simplify the
EXPR_STACK constraint, as we no longer have instructions being reordered
after stackification and before coloring.

llvm-svn: 256402
2015-12-25 00:31:02 +00:00
..
AArch64 [AArch64] Promote loads from stored 2015-12-22 16:36:16 +00:00
AMDGPU AMDGPU/SI: Use flat for global load/store when targeting HSA 2015-12-22 20:55:23 +00:00
ARM Convert the CodeGen/ARM/sched-it-debug-nodes.ll testcase from IR -> MIR. 2015-12-21 19:44:42 +00:00
BPF
CPP
Generic
Hexagon [Hexagon] Add PIC support 2015-12-18 20:19:30 +00:00
Inputs
Mips Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst 2015-12-21 22:00:51 +00:00
MIR Convert the CodeGen/ARM/sched-it-debug-nodes.ll testcase from IR -> MIR. 2015-12-21 19:44:42 +00:00
MSP430
NVPTX
PowerPC
SPARC
SystemZ [SystemZ] Fix assertion failure in adjustSubwordCmp 2015-12-16 18:04:06 +00:00
Thumb
Thumb2
WebAssembly [WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify. 2015-12-25 00:31:02 +00:00
WinEH [WinEH] Don't visit the same catchswitch twice 2015-12-23 03:59:04 +00:00
X86 AVX-512: Kreg set 0/1 optimization 2015-12-24 08:12:22 +00:00
XCore