Matt Arsenault 2915cfd231 AMDGPU: Add definition for v_swap_b32 ... This is somewhat tricky because there are two pairs of tied operands, and it isn't allowed to be VOP3 encoded. llvm-svn: 296519		2017-02-28 21:09:04 +00:00
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AArch64	Revert r294437 as it broke an asan buildbot.	2017-02-08 21:41:16 +00:00
AMDGPU	AMDGPU: Add definition for v_swap_b32	2017-02-28 21:09:04 +00:00
ARM	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
Hexagon	[Hexagon] Replace instruction definitions with auto-generated ones	2017-02-10 15:33:13 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips] Correct c.cond.fmt instruction definition.	2017-01-16 13:55:58 +00:00
PowerPC	Add some Book-E instructions to the asm parser and printer.	2017-01-29 04:55:57 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[X86] Clzero intrinsic and its addition under znver1	2017-02-09 04:27:34 +00:00
XCore