Nirav Dave e24ecaa975 In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. ... Recommiting after fixup of 32-bit aliasing sign offset bug in DAGCombiner. * Simplify Consecutive Merge Store Candidate Search Now that address aliasing is much less conservative, push through simplified store merging search and chain alias analysis which only checks for parallel stores through the chain subgraph. This is cleaner as the separation of non-interfering loads/stores from the store-merging logic. When merging stores search up the chain through a single load, and finds all possible stores by looking down from through a load and a TokenFactor to all stores visited. This improves the quality of the output SelectionDAG and the output Codegen (save perhaps for some ARM cases where we correctly constructs wider loads, but then promotes them to float operations which appear but requires more expensive constant generation). Some minor peephole optimizations to deal with improved SubDAG shapes (listed below) Additional Minor Changes: 1. Finishes removing unused AliasLoad code 2. Unifies the chain aggregation in the merged stores across code paths 3. Re-add the Store node to the worklist after calling SimplifyDemandedBits. 4. Increase GatherAllAliasesMaxDepth from 6 to 18. That number is arbitrary, but seems sufficient to not cause regressions in tests. 5. Remove Chain dependencies of Memory operations on CopyfromReg nodes as these are captured by data dependence 6. Forward loads-store values through tokenfactors containing {CopyToReg,CopyFromReg} Values. 7. Peephole to convert buildvector of extract_vector_elt to extract_subvector if possible (see CodeGen/AArch64/store-merge.ll) 8. Store merging for the ARM target is restricted to 32-bit as some in some contexts invalid 64-bit operations are being generated. This can be removed once appropriate checks are added. This finishes the change Matt Arsenault started in r246307 and jyknight's original patch. Many tests required some changes as memory operations are now reorderable, improving load-store forwarding. One test in particular is worth noting: CodeGen/PowerPC/ppc64-align-long-double.ll - Improved load-store forwarding converts a load-store pair into a parallel store and a memory-realized bitcast of the same value. However, because we lose the sharing of the explicit and implicit store values we must create another local store. A similar transformation happens before SelectionDAG as well. Reviewers: arsenm, hfinkel, tstellarAMD, jyknight, nhaehnle llvm-svn: 296476		2017-02-28 14:24:15 +00:00
..
CMakeLists.txt	[CMake] NFC. Updating CMake dependency specifications	2016-11-17 04:36:50 +00:00
DAGCombiner.cpp	In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.	2017-02-28 14:24:15 +00:00
FastISel.cpp	[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-02-27 22:45:06 +00:00
FunctionLoweringInfo.cpp	Simplify FunctionLoweringInfo.cpp with range for loops	2016-12-30 00:21:38 +00:00
InstrEmitter.cpp	Removing a redundant assignment	2017-02-14 14:44:01 +00:00
InstrEmitter.h	Pass DebugLoc and SDLoc by const ref.	2016-06-12 15:39:02 +00:00
LegalizeDAG.cpp	Use SelectionDAG::getBuildVector helper function where possible. NFCI.	2017-01-30 18:53:45 +00:00
LegalizeFloatTypes.cpp	[legalizetypes] Push fp16 -> fp32 extension node to worklist.	2017-02-01 13:01:33 +00:00
LegalizeIntegerTypes.cpp	Remove unused CONVERT_RNDSAT intrinsics	2017-01-10 22:38:02 +00:00
LegalizeTypes.cpp	[legalizetypes] Push fp16 -> fp32 extension node to worklist.	2017-02-01 13:01:33 +00:00
LegalizeTypes.h	[SelectionDAG] Add scalarization support for ISD::*_EXTEND_VECTOR_INREG opcodes.	2017-02-20 11:55:58 +00:00
LegalizeTypesGeneric.cpp	Do not assume that FP vector operands are never legalized by expanding	2016-10-26 19:51:35 +00:00
LegalizeVectorOps.cpp	DAG: Do not scalarize fsub if fneg is legal	2017-02-15 22:02:42 +00:00
LegalizeVectorTypes.cpp	[SelectionDAG] Add scalarization support for ISD::*_EXTEND_VECTOR_INREG opcodes.	2017-02-20 11:55:58 +00:00
LLVMBuild.txt
ResourcePriorityQueue.cpp	Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFC	2017-01-25 19:29:04 +00:00
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp	Cleanup dump() functions.	2017-01-28 02:02:38 +00:00
ScheduleDAGSDNodes.cpp	Remove redundant call to GluedNodes.back() [NFC]	2017-02-19 16:56:18 +00:00
ScheduleDAGSDNodes.h	[Target] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).	2017-01-11 01:45:03 +00:00
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h	Apply clang-tidy's misc-move-constructor-init throughout LLVM.	2016-05-27 14:27:24 +00:00
SelectionDAG.cpp	[DAGCombine] Allow vector constant folding of any value type before type legalization	2017-02-10 14:37:25 +00:00
SelectionDAGBuilder.cpp	[SelectionDAGBuilder] Simplify creation of shufflevector DAG nodes where inputs are larger than the mask	2017-02-15 05:57:16 +00:00
SelectionDAGBuilder.h	Add intrinsics for constrained floating point operations	2017-01-26 23:27:59 +00:00
SelectionDAGDumper.cpp	Cleanup dump() functions.	2017-01-28 02:02:38 +00:00
SelectionDAGISel.cpp	ISel: We need to notify FastIS of the IMPLICIT_DEF we created in createSwiftErrorEntriesInEntryBlock	2017-02-27 22:12:06 +00:00
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp	[Statepoints] Reuse stack slots more than once within a basic block	2016-12-13 01:21:15 +00:00
StatepointLowering.h	[NFC] Header cleanup	2016-04-18 09:17:29 +00:00
TargetLowering.cpp	[TargetLowering] fix SETCC SETLT folding with FP types	2017-02-12 23:07:52 +00:00