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deba7b1d7c
ISD::ROTL/ROTR rotation values are guaranteed to act as a modulo amount, so for power-of-2 bitwidths we only need the lowest bits. Differential Revision: https://reviews.llvm.org/D76201
55 lines
1.6 KiB
LLVM
55 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | FileCheck %s
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define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
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; CHECK-LABEL: rotl32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rotlw 3, 3, 4
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; CHECK-NEXT: blr
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%shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
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%B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1]
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%Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
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%shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
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%C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @rotr32(i32 %A, i8 %Amt) nounwind {
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; CHECK-LABEL: rotr32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subfic 4, 4, 32
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; CHECK-NEXT: rotlw 3, 3, 4
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; CHECK-NEXT: blr
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%shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1]
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%B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1]
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%Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
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%shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
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%C = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @rotli32(i32 %A) nounwind {
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; CHECK-LABEL: rotli32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rotlwi 3, 3, 5
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; CHECK-NEXT: blr
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%B = shl i32 %A, 5 ; <i32> [#uses=1]
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%C = lshr i32 %A, 27 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @rotri32(i32 %A) nounwind {
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; CHECK-LABEL: rotri32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rotlwi 3, 3, 27
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; CHECK-NEXT: blr
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%B = lshr i32 %A, 5 ; <i32> [#uses=1]
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%C = shl i32 %A, 27 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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