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e297a43f7c
This patch fixes register alignment for long double type in soft float mode. Before this patch alignment was 8 and this patch changes it to 4. Differential Revision: http://reviews.llvm.org/D18034 llvm-svn: 268909
43 lines
1.2 KiB
C++
43 lines
1.2 KiB
C++
//===---- PPCCCState.h - CCState with PowerPC specific extensions -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PPCCCSTATE_H
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#define PPCCCSTATE_H
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#include "PPCISelLowering.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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namespace llvm {
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class PPCCCState : public CCState {
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public:
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void
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PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
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void
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PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
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private:
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// Records whether the value has been lowered from an ppcf128.
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SmallVector<bool, 4> OriginalArgWasPPCF128;
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public:
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PPCCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
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SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
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: CCState(CC, isVarArg, MF, locs, C) {}
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bool WasOriginalArgPPCF128(unsigned ValNo) { return OriginalArgWasPPCF128[ValNo]; }
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void clearWasPPCF128() { OriginalArgWasPPCF128.clear(); }
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};
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}
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#endif
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