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e2b0519ed8
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
llvm-svn: 174054
152 lines
3.5 KiB
LLVM
152 lines
3.5 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -march=aarch64 | FileCheck %s
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define i32 @test_floattoi32(float %in) {
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; CHECK: test_floattoi32:
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%signed = fptosi float %in to i32
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%unsigned = fptoui float %in to i32
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; CHECK: fcvtzu [[UNSIG:w[0-9]+]], {{s[0-9]+}}
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; CHECK: fcvtzs [[SIG:w[0-9]+]], {{s[0-9]+}}
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%res = sub i32 %signed, %unsigned
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; CHECK: sub {{w[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i32 %res
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; CHECK: ret
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}
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define i32 @test_doubletoi32(double %in) {
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; CHECK: test_doubletoi32:
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%signed = fptosi double %in to i32
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%unsigned = fptoui double %in to i32
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; CHECK: fcvtzu [[UNSIG:w[0-9]+]], {{d[0-9]+}}
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; CHECK: fcvtzs [[SIG:w[0-9]+]], {{d[0-9]+}}
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%res = sub i32 %signed, %unsigned
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; CHECK: sub {{w[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i32 %res
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; CHECK: ret
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}
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define i64 @test_floattoi64(float %in) {
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; CHECK: test_floattoi64:
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%signed = fptosi float %in to i64
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%unsigned = fptoui float %in to i64
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; CHECK: fcvtzu [[UNSIG:x[0-9]+]], {{s[0-9]+}}
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; CHECK: fcvtzs [[SIG:x[0-9]+]], {{s[0-9]+}}
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%res = sub i64 %signed, %unsigned
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; CHECK: sub {{x[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i64 %res
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; CHECK: ret
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}
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define i64 @test_doubletoi64(double %in) {
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; CHECK: test_doubletoi64:
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%signed = fptosi double %in to i64
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%unsigned = fptoui double %in to i64
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; CHECK: fcvtzu [[UNSIG:x[0-9]+]], {{d[0-9]+}}
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; CHECK: fcvtzs [[SIG:x[0-9]+]], {{d[0-9]+}}
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%res = sub i64 %signed, %unsigned
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; CHECK: sub {{x[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i64 %res
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; CHECK: ret
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}
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define float @test_i32tofloat(i32 %in) {
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; CHECK: test_i32tofloat:
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%signed = sitofp i32 %in to float
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%unsigned = uitofp i32 %in to float
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; CHECK: ucvtf [[UNSIG:s[0-9]+]], {{w[0-9]+}}
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; CHECK: scvtf [[SIG:s[0-9]+]], {{w[0-9]+}}
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%res = fsub float %signed, %unsigned
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; CHECL: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]]
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ret float %res
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; CHECK: ret
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}
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define double @test_i32todouble(i32 %in) {
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; CHECK: test_i32todouble:
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%signed = sitofp i32 %in to double
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%unsigned = uitofp i32 %in to double
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; CHECK: ucvtf [[UNSIG:d[0-9]+]], {{w[0-9]+}}
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; CHECK: scvtf [[SIG:d[0-9]+]], {{w[0-9]+}}
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%res = fsub double %signed, %unsigned
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; CHECK: fsub {{d[0-9]+}}, [[SIG]], [[UNSIG]]
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ret double %res
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; CHECK: ret
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}
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define float @test_i64tofloat(i64 %in) {
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; CHECK: test_i64tofloat:
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%signed = sitofp i64 %in to float
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%unsigned = uitofp i64 %in to float
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; CHECK: ucvtf [[UNSIG:s[0-9]+]], {{x[0-9]+}}
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; CHECK: scvtf [[SIG:s[0-9]+]], {{x[0-9]+}}
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%res = fsub float %signed, %unsigned
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; CHECK: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]]
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ret float %res
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; CHECK: ret
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}
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define double @test_i64todouble(i64 %in) {
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; CHECK: test_i64todouble:
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%signed = sitofp i64 %in to double
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%unsigned = uitofp i64 %in to double
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; CHECK: ucvtf [[UNSIG:d[0-9]+]], {{x[0-9]+}}
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; CHECK: scvtf [[SIG:d[0-9]+]], {{x[0-9]+}}
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%res = fsub double %signed, %unsigned
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; CHECK: sub {{d[0-9]+}}, [[SIG]], [[UNSIG]]
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ret double %res
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; CHECK: ret
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}
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define i32 @test_bitcastfloattoi32(float %in) {
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; CHECK: test_bitcastfloattoi32:
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%res = bitcast float %in to i32
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; CHECK: fmov {{w[0-9]+}}, {{s[0-9]+}}
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ret i32 %res
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}
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define i64 @test_bitcastdoubletoi64(double %in) {
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; CHECK: test_bitcastdoubletoi64:
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%res = bitcast double %in to i64
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; CHECK: fmov {{x[0-9]+}}, {{d[0-9]+}}
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ret i64 %res
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}
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define float @test_bitcasti32tofloat(i32 %in) {
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; CHECK: test_bitcasti32tofloat:
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%res = bitcast i32 %in to float
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; CHECK: fmov {{s[0-9]+}}, {{w[0-9]+}}
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ret float %res
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}
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define double @test_bitcasti64todouble(i64 %in) {
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; CHECK: test_bitcasti64todouble:
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%res = bitcast i64 %in to double
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; CHECK: fmov {{d[0-9]+}}, {{x[0-9]+}}
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ret double %res
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}
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