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0d89e9527b
Summary: Version 2 is now the default. If you want to emit version 1, use the amdgcn--amdhsa-amdcov1 triple. Reviewers: arsenm, kzhuravl Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19283 llvm-svn: 268647
28 lines
1.3 KiB
LLVM
28 lines
1.3 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s
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; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s
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@readonly = private unnamed_addr addrspace(2) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0]
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@readonly2 = private unnamed_addr addrspace(2) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0]
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; GCN-LABEL: {{^}}main:
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; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
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; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], readonly
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; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0
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; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
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; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], readonly
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; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0
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; NOHSA: .text
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; HSA: .text
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; GCN: readonly:
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; GCN: readonly2:
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define void @main(i32 %index, float addrspace(1)* %out) {
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%ptr = getelementptr [4 x float], [4 x float] addrspace(2) * @readonly, i32 0, i32 %index
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%val = load float, float addrspace(2)* %ptr
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store float %val, float addrspace(1)* %out
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%ptr2 = getelementptr [4 x float], [4 x float] addrspace(2) * @readonly2, i32 0, i32 %index
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%val2 = load float, float addrspace(2)* %ptr2
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store float %val2, float addrspace(1)* %out
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ret void
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}
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