1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
llvm-mirror/test/CodeGen/AMDGPU/hsa-fp-mode.ll
Matt Arsenault 2c5f486332 AMDGPU: Set DX10Clamp bit
llvm-svn: 259088
2016-01-28 20:53:35 +00:00

11 lines
545 B
LLVM

; RUN: llc -march=amdgcn -mcpu=kaveri -mtriple=amdgcn-unknown-amdhsa -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=COMMON %s
; COMMON-LABEL: {{^}}test_kernel:
; COMMON-DENORMAL: compute_pgm_rsrc1_float_mode = compute_pgm_rsrc1_float_mode = 192
; COMMON-DENORMAL: compute_pgm_rsrc1_dx10_clamp = 1
define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}