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7a5e15697d
The intrinsic target prefix should match the target name as it appears in the triple. This is not yet complete, but gets most of the important ones. llvm.AMDGPU.* intrinsics used by mesa and libclc are still handled for compatability for now. llvm-svn: 258557
37 lines
1.0 KiB
LLVM
37 lines
1.0 KiB
LLVM
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s
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; EG-LABEL: {{^}}read_workdim:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[2].Z
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define void @read_workdim(i32 addrspace(1)* %out) {
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entry:
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%dim = call i32 @llvm.r600.read.workdim() #0
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store i32 %dim, i32 addrspace(1)* %out
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ret void
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}
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; EG-LABEL: {{^}}read_workdim_known_bits:
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define void @read_workdim_known_bits(i32 addrspace(1)* %out) {
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entry:
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%dim = call i32 @llvm.r600.read.workdim() #0
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%shl = shl i32 %dim, 24
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%shr = lshr i32 %shl, 24
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store i32 %shr, i32 addrspace(1)* %out
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ret void
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}
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; EG-LABEL: {{^}}legacy_read_workdim:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[2].Z
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define void @legacy_read_workdim(i32 addrspace(1)* %out) {
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entry:
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%dim = call i32 @llvm.AMDGPU.read.workdim() #0
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store i32 %dim, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.r600.read.workdim() #0
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declare i32 @llvm.AMDGPU.read.workdim() #0
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attributes #0 = { nounwind readnone }
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