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d6a1215edc
This patch corresponds to review: http://reviews.llvm.org/D18592 It allows the PPC back end to generate the xxspltw instruction where we previously only emitted vspltw. llvm-svn: 268516
16 lines
525 B
LLVM
16 lines
525 B
LLVM
; RUN: llc -mtriple=powerpc64-linux-gnu -mcpu=pwr8 -mattr=+vsx < %s | FileCheck %s
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define <4 x float> @bar(float* %p, float* %q) {
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%1 = bitcast float* %p to <12 x float>*
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%2 = bitcast float* %q to <12 x float>*
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%3 = load <12 x float>, <12 x float>* %1, align 16
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%4 = load <12 x float>, <12 x float>* %2, align 16
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%5 = fsub <12 x float> %4, %3
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%6 = shufflevector <12 x float> %5, <12 x float> undef, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
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ret <4 x float> %6
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; CHECK: xxspltw
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; CHECK: vmrghw
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; CHECK: vsldoi
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}
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