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4e2def1840
TableGen had been nicely generating code to print a number of instructions using shorter aliases (and PowerPC has plenty of short mnemonics), but we were not calling it. For some of the aliases we support in the parser, TableGen can't infer the "inverse" alias relationship, so there is still more to do. Thus, after some hours of updating test cases... llvm-svn: 235616
21 lines
478 B
LLVM
21 lines
478 B
LLVM
; RUN: llc < %s -march=ppc64 | grep rotld
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; RUN: llc < %s -march=ppc64 | grep rotldi
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; PR1613
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define i64 @t1(i64 %A) {
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%tmp1 = lshr i64 %A, 57
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%tmp2 = shl i64 %A, 7
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%tmp3 = or i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @t2(i64 %A, i8 zeroext %Amt) {
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%Amt1 = zext i8 %Amt to i64
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%tmp1 = lshr i64 %A, %Amt1
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%Amt2 = sub i8 64, %Amt
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%Amt3 = zext i8 %Amt2 to i64
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%tmp2 = shl i64 %A, %Amt3
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%tmp3 = or i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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