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351e1900a0
The code change is simple enough: instead of attaching an anonymous SDLoc to splatted vector constants, use the scalar constant's existing SDLoc since that is what is passed into getConstant() as a param. But this changes instruction scheduling, so I'll explain why that happens. The motivation for this patch starts near: http://reviews.llvm.org/rL258833 ...x86's getZeroVector() could be similarly cleaned up and I thought it would be 'NFC'. But when I made that change locally, several x86 codegen tests wiggled. It turns out that the lack of SDLoc consistency in getConstant() changes the way ScheduleDAGRRList behaves. This is because the SDLoc contains 'IROrder' and some DAG scheduler algorithms use IROrder for tie-breaking. Differential Revision: http://reviews.llvm.org/D16972 llvm-svn: 260582
145 lines
4.8 KiB
LLVM
145 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s
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declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
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declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
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declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
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define <2 x i64> @footz(<2 x i64> %a) nounwind {
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; CHECK-LABEL: footz:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsfq %rax, %rax
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; CHECK-NEXT: movd %rax, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsfq %rax, %rax
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; CHECK-NEXT: movd %rax, %xmm0
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 true)
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ret <2 x i64> %c
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}
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define <2 x i64> @foolz(<2 x i64> %a) nounwind {
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; CHECK-LABEL: foolz:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsrq %rax, %rax
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; CHECK-NEXT: xorq $63, %rax
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; CHECK-NEXT: movd %rax, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsrq %rax, %rax
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; CHECK-NEXT: xorq $63, %rax
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; CHECK-NEXT: movd %rax, %xmm0
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
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ret <2 x i64> %c
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}
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define <2 x i64> @foopop(<2 x i64> %a) nounwind {
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; CHECK-LABEL: foopop:
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; CHECK: # BB#0:
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrlq $1, %xmm1
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; CHECK-NEXT: pand {{.*}}(%rip), %xmm1
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; CHECK-NEXT: psubq %xmm1, %xmm0
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [3689348814741910323,3689348814741910323]
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; CHECK-NEXT: movdqa %xmm0, %xmm2
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; CHECK-NEXT: pand %xmm1, %xmm2
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; CHECK-NEXT: psrlq $2, %xmm0
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; CHECK-NEXT: pand %xmm1, %xmm0
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; CHECK-NEXT: paddq %xmm2, %xmm0
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrlq $4, %xmm1
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; CHECK-NEXT: paddq %xmm0, %xmm1
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; CHECK-NEXT: pand {{.*}}(%rip), %xmm1
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; CHECK-NEXT: pxor %xmm0, %xmm0
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; CHECK-NEXT: psadbw %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%c = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %a)
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ret <2 x i64> %c
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}
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declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1)
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declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
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declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
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define <2 x i32> @promtz(<2 x i32> %a) nounwind {
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; CHECK-LABEL: promtz:
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; CHECK: # BB#0:
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; CHECK-NEXT: por {{.*}}(%rip), %xmm0
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsfq %rax, %rax
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; CHECK-NEXT: movl $64, %ecx
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; CHECK-NEXT: cmoveq %rcx, %rax
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; CHECK-NEXT: movd %rax, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsfq %rax, %rax
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; CHECK-NEXT: cmoveq %rcx, %rax
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; CHECK-NEXT: movd %rax, %xmm0
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%c = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %a, i1 false)
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ret <2 x i32> %c
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}
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define <2 x i32> @promlz(<2 x i32> %a) nounwind {
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; CHECK-LABEL: promlz:
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; CHECK: # BB#0:
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; CHECK-NEXT: pand {{.*}}(%rip), %xmm0
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsrq %rax, %rax
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; CHECK-NEXT: movl $127, %ecx
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; CHECK-NEXT: cmoveq %rcx, %rax
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; CHECK-NEXT: xorq $63, %rax
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; CHECK-NEXT: movd %rax, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: movd %xmm0, %rax
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; CHECK-NEXT: bsrq %rax, %rax
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; CHECK-NEXT: cmoveq %rcx, %rax
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; CHECK-NEXT: xorq $63, %rax
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; CHECK-NEXT: movd %rax, %xmm0
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; CHECK-NEXT: psubq {{.*}}(%rip), %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%c = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %a, i1 false)
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ret <2 x i32> %c
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}
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define <2 x i32> @prompop(<2 x i32> %a) nounwind {
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; CHECK-LABEL: prompop:
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; CHECK: # BB#0:
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; CHECK-NEXT: pand {{.*}}(%rip), %xmm0
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; CHECK-NEXT: pxor %xmm2, %xmm2
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrlq $1, %xmm1
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; CHECK-NEXT: pand {{.*}}(%rip), %xmm1
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; CHECK-NEXT: psubq %xmm1, %xmm0
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [3689348814741910323,3689348814741910323]
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; CHECK-NEXT: movdqa %xmm0, %xmm3
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; CHECK-NEXT: pand %xmm1, %xmm3
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; CHECK-NEXT: psrlq $2, %xmm0
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; CHECK-NEXT: pand %xmm1, %xmm0
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; CHECK-NEXT: paddq %xmm3, %xmm0
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrlq $4, %xmm1
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; CHECK-NEXT: paddq %xmm0, %xmm1
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; CHECK-NEXT: pand {{.*}}(%rip), %xmm1
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; CHECK-NEXT: psadbw %xmm2, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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%c = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
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ret <2 x i32> %c
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}
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