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llvm-mirror/test/CodeGen/X86/x86-64-flags-intrinsics.ll
David Majnemer 572acaa24c [X86] Permit reading of the FLAGS register without it being previously defined
We modeled the RDFLAGS{32,64} operations as "using" {E,R}FLAGS.
While technically correct, this is not be desirable for folks who want
to examine aspects of the FLAGS register which are not related to
computation like whether or not CPUID is a valid instruction.

Differential Revision: http://reviews.llvm.org/D17782

llvm-svn: 262465
2016-03-02 06:46:52 +00:00

38 lines
890 B
LLVM

; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target triple = "x86_64-pc-win32"
declare i64 @llvm.x86.flags.read.u64()
declare void @llvm.x86.flags.write.u64(i64)
define i64 @read_flags() {
entry:
%flags = call i64 @llvm.x86.flags.read.u64()
ret i64 %flags
}
; CHECK-LABEL: read_flags:
; CHECK: pushq %rbp
; CHECK: .seh_pushreg 5
; CHECK: movq %rsp, %rbp
; CHECK: .seh_setframe 5, 0
; CHECK: .seh_endprologue
; CHECK-NEXT: pushfq
; CHECK-NEXT: popq %rax
; CHECK-NEXT: popq %rbp
define void @write_flags(i64 %arg) {
entry:
call void @llvm.x86.flags.write.u64(i64 %arg)
ret void
}
; CHECK-LABEL: write_flags:
; CHECK: pushq %rbp
; CHECK: .seh_pushreg 5
; CHECK: movq %rsp, %rbp
; CHECK: .seh_setframe 5, 0
; CHECK: .seh_endprologue
; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: popfq
; CHECK-NEXT: popq %rbp