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llvm-mirror/test/MC/Disassembler
Renato Golin 2400e22c37 Thumb2 M-class MSR instruction support changes
This patch implements a few changes related to the Thumb2 M-class MSR instruction:
 * better handling of unpredictable encodings,
 * recognition of the _g and _nzcvqg variants by the asm parser only if the DSP
   extension is available, preferred output of MSR APSR moves with the _<bits>
   suffix for v7-M.

Patch by Petr Pavlu.

llvm-svn: 216874
2014-09-01 11:25:07 +00:00
..
AArch64 Condition codes AL and NV are invalid in the aliases that use 2014-06-10 13:11:35 +00:00
ARM Thumb2 M-class MSR instruction support changes 2014-09-01 11:25:07 +00:00
Mips [mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions 2014-07-09 10:40:20 +00:00
PowerPC [PowerPC] Add support for dcbtst and icbt (prefetch) 2014-08-23 23:21:04 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA 2014-07-10 11:00:55 +00:00
X86 [X86] AVX512: Add disassembler support for compressed displacement 2014-07-17 17:04:56 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00