mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 04:52:54 +02:00
b4b51eb3aa
This reland includes a check to prevent the DAG combiner from folding an offset that is smaller than the existing one. This can cause oscillations between two possible DAGs, which was the cause of the hang and later assertion failure observed on the lnt-ctmark-aarch64-O3-flto bot. http://green.lab.llvm.org/green/job/lnt-ctmark-aarch64-O3-flto/2024/ Original commit message: > This is a code size win in code that takes offseted addresses > frequently, such as C++ constructors that typically need to compute > an offseted address of a vtable. This reduces the size of Chromium > for Android's .text section by 108KB. Differential Revision: https://reviews.llvm.org/D45199 llvm-svn: 330630
65 lines
1.7 KiB
LLVM
65 lines
1.7 KiB
LLVM
; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false \
|
|
; RUN: -aarch64-enable-collect-loh=false -aarch64-enable-global-merge \
|
|
; RUN: -global-merge-group-by-use -global-merge-ignore-single-use %s -o - \
|
|
; RUN: | FileCheck %s
|
|
|
|
; We assume that globals of the same size aren't reordered inside a set.
|
|
|
|
@m1 = internal global i32 0, align 4
|
|
@n1 = internal global i32 0, align 4
|
|
@o1 = internal global i32 0, align 4
|
|
|
|
; CHECK-LABEL: f1:
|
|
define void @f1(i32 %a1, i32 %a2) #0 {
|
|
; CHECK-NEXT: adrp x8, [[SET:__MergedGlobals]]@PAGE
|
|
; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
|
|
; CHECK-NEXT: stp w0, w1, [x8]
|
|
; CHECK-NEXT: ret
|
|
store i32 %a1, i32* @m1, align 4
|
|
store i32 %a2, i32* @n1, align 4
|
|
ret void
|
|
}
|
|
|
|
@m2 = internal global i32 0, align 4
|
|
@n2 = internal global i32 0, align 4
|
|
|
|
; CHECK-LABEL: f2:
|
|
define void @f2(i32 %a1, i32 %a2, i32 %a3) #0 {
|
|
; CHECK-NEXT: adrp x8, [[SET]]@PAGE
|
|
; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
|
|
; CHECK-NEXT: stp w0, w1, [x8]
|
|
; CHECK-NEXT: str w2, [x8, #8]
|
|
; CHECK-NEXT: ret
|
|
store i32 %a1, i32* @m1, align 4
|
|
store i32 %a2, i32* @n1, align 4
|
|
store i32 %a3, i32* @o1, align 4
|
|
ret void
|
|
}
|
|
|
|
; CHECK-LABEL: f3:
|
|
define void @f3(i32 %a1, i32 %a2) #0 {
|
|
; CHECK-NEXT: adrp x8, [[SET]]@PAGE+12
|
|
; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF+12
|
|
; CHECK-NEXT: stp w0, w1, [x8]
|
|
; CHECK-NEXT: ret
|
|
store i32 %a1, i32* @m2, align 4
|
|
store i32 %a2, i32* @n2, align 4
|
|
ret void
|
|
}
|
|
|
|
@o2 = internal global i32 0, align 4
|
|
|
|
; CHECK-LABEL: f4:
|
|
define void @f4(i32 %a1) #0 {
|
|
; CHECK-NEXT: adrp x8, _o2@PAGE
|
|
; CHECK-NEXT: str w0, [x8, _o2@PAGEOFF]
|
|
; CHECK-NEXT: ret
|
|
store i32 %a1, i32* @o2, align 4
|
|
ret void
|
|
}
|
|
|
|
; CHECK-DAG: .zerofill __DATA,__bss,[[SET]],20,4
|
|
; CHECK-DAG: .zerofill __DATA,__bss,_o2,4,2
|
|
|
|
attributes #0 = { nounwind }
|