1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 08:23:21 +01:00
llvm-mirror/test/CodeGen
Richard Osborne fe30a8a2c1 Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.
Previously LoopStrengthReduce would sometimes be unable to find
a legal formula, causing an assertion failure.

llvm-svn: 97226
2010-02-26 16:44:51 +00:00
..
Alpha
ARM Check for comparisons of +/- zero when optimizing less-than-or-equal and 2010-02-24 22:15:53 +00:00
Blackfin Change the scheduler from adding nodes in allnodes order 2010-02-24 06:11:37 +00:00
CBackend
CellSPU
CPP
Generic
MBlaze Adding the MicroBlaze backend. 2010-02-23 19:15:24 +00:00
Mips
MSP430 Change the scheduler from adding nodes in allnodes order 2010-02-24 06:11:37 +00:00
PIC16 emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1, 2010-01-20 07:19:19 +00:00
PowerPC Change the scheduler from adding nodes in allnodes order 2010-02-24 06:11:37 +00:00
SPARC
SystemZ
Thumb
Thumb2 Create a stack frame on ARM when 2010-02-24 22:43:17 +00:00
X86 change the scope node to include a list of children to be checked 2010-02-25 19:00:39 +00:00
XCore Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy. 2010-02-26 16:44:51 +00:00