Chris Lattner e43007d443 add support for the sparcv9-*-* target triple to turn on ... 64-bit sparc codegen. Patch by Nathan Keynes! llvm-svn: 95293		2010-02-04 06:34:01 +00:00
..
Alpha	Delete useless trailing semicolons.	2010-01-05 17:55:26 +00:00
ARM	Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.	2010-01-30 14:08:12 +00:00
Blackfin	Teach dag combine to fold the following transformation more aggressively:	2010-01-06 19:38:29 +00:00
CBackend
CellSPU	don't let asm-verbose break the check-next lines in these tests.	2010-01-19 06:39:54 +00:00
CPP
Generic	just remove this test, it is not reduced, is not clear what its testing for and	2010-01-24 19:23:09 +00:00
Mips	Delete useless trailing semicolons.	2010-01-05 17:55:26 +00:00
MSP430	Reenable tests	2010-01-15 21:19:26 +00:00
PIC16	emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1,	2010-01-20 07:19:19 +00:00
PowerPC	Reapply 95050 with a tweak to check the register class.	2010-02-03 01:40:33 +00:00
SPARC	add support for the sparcv9-*-* target triple to turn on	2010-02-04 06:34:01 +00:00
SystemZ	Teach dag combine to fold the following transformation more aggressively:	2010-01-06 19:38:29 +00:00
Thumb	Run the pre-register allocation tail duplication pass by default. Remove	2010-01-16 00:29:50 +00:00
Thumb2	Revert LoopStrengthReduce.cpp to pre-r94061 for now.	2010-01-22 00:46:49 +00:00
X86	Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.	2010-02-03 21:40:40 +00:00
XCore	convert the last 3 targets to use EmitFunctionBody() now that	2010-01-28 06:22:43 +00:00