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dacbc9891d
This converts the ARM AsmParser to use the new assembly matcher error reporting mechanism, which allows errors to be reported for multiple instruction encodings when it is ambiguous which one the user intended to use. By itself this doesn't improve many error messages, because we don't have diagnostic text for most operand types, but as we add that then this will allow more of those diagnostic strings to be used when they are relevant. Differential revision: https://reviews.llvm.org/D31530 llvm-svn: 314779
191 lines
11 KiB
ArmAsm
191 lines
11 KiB
ArmAsm
// RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.3a,+neon,+fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=THUMB --check-prefix=FP16-THUMB
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// RUN: FileCheck --check-prefix=STDERR --check-prefix=NEON-STDERR <%t %s
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// RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.3a,+neon,+fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=ARM --check-prefix=FP16-ARM
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// RUN: FileCheck --check-prefix=STDERR --check-prefix=NEON-STDERR <%t %s
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// RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.3a,+neon,-fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=THUMB
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// RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-FP16-STDERR --check-prefix=NEON-STDERR <%t %s
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// RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.3a,+neon,-fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=ARM
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// RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-FP16-STDERR --check-prefix=NEON-STDERR <%t %s
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// RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.3a,-neon,+fullfp16 -show-encoding < %s 2>%t
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// RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-NEON-STDERR <%t %s
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// RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.3a,-neon,+fullfp16 -show-encoding < %s 2>%t
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// RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-NEON-STDERR <%t %s
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// RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.2a,+neon,+fullfp16 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=V82A
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// RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.2a,+neon,+fullfp16 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=V82A
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/* ==== VCMLA vector ==== */
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// Valid types
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vcmla.f16 d0, d1, d2, #0
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// FP16-ARM: vcmla.f16 d0, d1, d2, #0 @ encoding: [0x02,0x08,0x21,0xfc]
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// FP16-THUMB: vcmla.f16 d0, d1, d2, #0 @ encoding: [0x21,0xfc,0x02,0x08]
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// NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
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// V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f16 q0, q1, q2, #0
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// FP16-ARM: vcmla.f16 q0, q1, q2, #0 @ encoding: [0x44,0x08,0x22,0xfc]
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// FP16-THUMB: vcmla.f16 q0, q1, q2, #0 @ encoding: [0x22,0xfc,0x44,0x08]
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// NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
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// V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 d0, d1, d2, #0
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// ARM: vcmla.f32 d0, d1, d2, #0 @ encoding: [0x02,0x08,0x31,0xfc]
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// THUMB: vcmla.f32 d0, d1, d2, #0 @ encoding: [0x31,0xfc,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 q0, q1, q2, #0
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// ARM: vcmla.f32 q0, q1, q2, #0 @ encoding: [0x44,0x08,0x32,0xfc]
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// THUMB: vcmla.f32 q0, q1, q2, #0 @ encoding: [0x32,0xfc,0x44,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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// Valid rotations
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vcmla.f32 d0, d1, d2, #90
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// ARM: vcmla.f32 d0, d1, d2, #90 @ encoding: [0x02,0x08,0xb1,0xfc]
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// THUMB: vcmla.f32 d0, d1, d2, #90 @ encoding: [0xb1,0xfc,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 d0, d1, d2, #180
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// ARM: vcmla.f32 d0, d1, d2, #180 @ encoding: [0x02,0x08,0x31,0xfd]
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// THUMB: vcmla.f32 d0, d1, d2, #180 @ encoding: [0x31,0xfd,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 d0, d1, d2, #270
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// ARM: vcmla.f32 d0, d1, d2, #270 @ encoding: [0x02,0x08,0xb1,0xfd]
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// THUMB: vcmla.f32 d0, d1, d2, #270 @ encoding: [0xb1,0xfd,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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// Invalid rotations
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vcmla.f32 d0, d1, d2, #-90
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcmla.f32 d0, d1, d2, #1
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcmla.f32 d0, d1, d2, #360
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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/* ==== VCADD vector ==== */
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// Valid types
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vcadd.f16 d0, d1, d2, #90
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// FP16-ARM: vcadd.f16 d0, d1, d2, #90 @ encoding: [0x02,0x08,0x81,0xfc]
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// FP16-THUMB: vcadd.f16 d0, d1, d2, #90 @ encoding: [0x81,0xfc,0x02,0x08]
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// NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
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// V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcadd.f16 q0, q1, q2, #90
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// FP16-ARM: vcadd.f16 q0, q1, q2, #90 @ encoding: [0x44,0x08,0x82,0xfc]
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// FP16-THUMB: vcadd.f16 q0, q1, q2, #90 @ encoding: [0x82,0xfc,0x44,0x08]
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// NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
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// V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcadd.f32 d0, d1, d2, #90
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// ARM: vcadd.f32 d0, d1, d2, #90 @ encoding: [0x02,0x08,0x91,0xfc]
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// THUMB: vcadd.f32 d0, d1, d2, #90 @ encoding: [0x91,0xfc,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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vcadd.f32 q0, q1, q2, #90
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// ARM: vcadd.f32 q0, q1, q2, #90 @ encoding: [0x44,0x08,0x92,0xfc]
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// THUMB: vcadd.f32 q0, q1, q2, #90 @ encoding: [0x92,0xfc,0x44,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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// Valid rotations
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vcadd.f32 d0, d1, d2, #270
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// ARM: vcadd.f32 d0, d1, d2, #270 @ encoding: [0x02,0x08,0x91,0xfd]
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// THUMB: vcadd.f32 d0, d1, d2, #270 @ encoding: [0x91,0xfd,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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// Invalid rotations
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vcadd.f32 d0, d1, d2, #0
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcadd.f32 d0, d1, d2, #180
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcadd.f32 d0, d1, d2, #-90
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcadd.f32 d0, d1, d2, #1
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcadd.f32 d0, d1, d2, #360
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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/* ==== VCMLA indexed ==== */
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// Valid types
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vcmla.f16 d0, d1, d2[0], #0
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// FP16-ARM: vcmla.f16 d0, d1, d2[0], #0 @ encoding: [0x02,0x08,0x01,0xfe]
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// FP16-THUMB: vcmla.f16 d0, d1, d2[0], #0 @ encoding: [0x01,0xfe,0x02,0x08]
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// NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
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// V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f16 q0, q1, d2[0], #0
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// FP16-ARM: vcmla.f16 q0, q1, d2[0], #0 @ encoding: [0x42,0x08,0x02,0xfe]
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// FP16-THUMB: vcmla.f16 q0, q1, d2[0], #0 @ encoding: [0x02,0xfe,0x42,0x08]
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// NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
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// V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 d0, d1, d2[0], #0
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// ARM: vcmla.f32 d0, d1, d2[0], #0 @ encoding: [0x02,0x08,0x81,0xfe]
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// THUMB: vcmla.f32 d0, d1, d2[0], #0 @ encoding: [0x81,0xfe,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 q0, q1, d2[0], #0
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// ARM: vcmla.f32 q0, q1, d2[0], #0 @ encoding: [0x42,0x08,0x82,0xfe]
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// THUMB: vcmla.f32 q0, q1, d2[0], #0 @ encoding: [0x82,0xfe,0x42,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
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// Valid rotations
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vcmla.f32 d0, d1, d2[0], #90
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// ARM: vcmla.f32 d0, d1, d2[0], #90 @ encoding: [0x02,0x08,0x91,0xfe]
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// THUMB: vcmla.f32 d0, d1, d2[0], #90 @ encoding: [0x91,0xfe,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 d0, d1, d2[0], #180
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// ARM: vcmla.f32 d0, d1, d2[0], #180 @ encoding: [0x02,0x08,0xa1,0xfe]
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// THUMB: vcmla.f32 d0, d1, d2[0], #180 @ encoding: [0xa1,0xfe,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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vcmla.f32 d0, d1, d2[0], #270
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// ARM: vcmla.f32 d0, d1, d2[0], #270 @ encoding: [0x02,0x08,0xb1,0xfe]
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// THUMB: vcmla.f32 d0, d1, d2[0], #270 @ encoding: [0xb1,0xfe,0x02,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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// Invalid rotations
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vcmla.f32 d0, d1, d2[0], #-90
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcmla.f32 d0, d1, d2[0], #1
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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vcmla.f32 d0, d1, d2[0], #360
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// NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
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// NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
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// Valid indices
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vcmla.f16 d0, d1, d2[1], #0
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// FP16-ARM: vcmla.f16 d0, d1, d2[1], #0 @ encoding: [0x22,0x08,0x01,0xfe]
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// FP16-THUMB: vcmla.f16 d0, d1, d2[1], #0 @ encoding: [0x01,0xfe,0x22,0x08]
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// V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
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// NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
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// Invalid indices
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// The text of these errors vary depending on whether fullfp16 is present.
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vcmla.f16 d0, d1, d2[2], #0
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// STDERR: :[[@LINE-1]]:{{[0-9]*}}: error:
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vcmla.f32 d0, d1, d2[1], #0
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// STDERR: :[[@LINE-1]]:{{[0-9]*}}: error:
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