..
cconv
[DAG] Do MergeConsecutiveStores again before Instruction Selection
2017-11-27 15:28:15 +00:00
compactbranches
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cstmaterialization
[mips] Move test to correct directory. NFCI
2017-10-18 13:59:48 +00:00
Fast-ISel
instverify
Reland "[mips] Fix the target specific instruction verifier"
2017-12-18 15:56:40 +00:00
llvm-ir
[SelectionDAG] Reverse the order of operands in the ISD::ADD created by TargetLowering::getVectorElementPointer so that the FrameIndex is on the left.
2017-12-22 17:18:13 +00:00
longbranch
[mips] Reorder target specific passes
2017-11-20 15:59:18 +00:00
micromips-sizereduction
mips32r6
mips64r6
mirparser
[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.
2018-01-10 00:56:48 +00:00
msa
[mips] Simplify test for 5.0.1 (NFC)
2017-11-14 19:11:45 +00:00
tailcall
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll
2008-07-29-icmp.ll
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-07-20-Switch.ll
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
2012-12-12-ExpandMemcpy.ll
2013-11-18-fp64-const0.ll
abicalls.ll
abiflags32.ll
abiflags-xx.ll
addc.ll
addi.ll
addressing-mode.ll
adjust-callstack-sp.ll
align16.ll
alloca16.ll
alloca.ll
analyzebranch.ll
and1.ll
asm-large-immediate.ll
assertzext-trunc.ll
atomic.ll
atomicCmpSwapPW.ll
atomicops.ll
beqzc1.ll
beqzc.ll
biggot.ll
blez_bgez.ll
blockaddr.ll
br-jmp.ll
[mips] Correct microMIP's jump and add unconditional branch pseudo
2017-11-09 16:02:18 +00:00
brconeq.ll
brconeqk.ll
brconeqz.ll
brconge.ll
brcongt.ll
brconle.ll
brconlt.ll
brconne.ll
brconnek.ll
brconnez.ll
brdelayslot.ll
brind-tailcall.ll
[mips] Guard indirect and tailcall pseudo instructions correctly.
2017-11-08 11:13:44 +00:00
brind.ll
brsize3.ll
brsize3a.ll
brundef.ll
bswap.ll
buildpairextractelementf64.ll
cache-intrinsic.ll
call-optimization.ll
cfi_offset.ll
check-adde-redundant-moves.ll
check-noat.ll
ci2.ll
cins.ll
cmov.ll
cmplarge.ll
const1.ll
const4a.ll
const6.ll
const6a.ll
const-mult.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
constantfp0.ll
constraint-c-err.ll
[mips] Replace assert by an error message
2017-12-29 19:18:24 +00:00
constraint-c.ll
[mips] Replace assert by an error message
2017-12-29 19:18:24 +00:00
countleading.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
cprestore.ll
ctlz-v.ll
ctlz.ll
cttz-v.ll
dagcombine_crash.ll
dagcombine-store-gep-chain-slow.ll
[DAGCombine] Disable finding better chains for stores at O0
2017-11-28 04:07:59 +00:00
DbgValueOtherTargets.test
delay-slot-fill-forward.ll
delay-slot-kill.ll
dext.ll
dins.ll
[mips] Match 'ins' and its' variants with C++ code
2017-11-03 15:35:13 +00:00
disable-tail-merge.ll
div_rem.ll
div.ll
divrem.ll
divu_remu.ll
divu.ll
double2int.ll
dsp-patterns-cmp-vselect.ll
dsp-patterns.ll
dsp-r1.ll
dsp-r2.ll
dsp-spill-reload.ll
[mips] Enable spilling and reloading of the dsp register set.
2017-10-03 13:45:49 +00:00
dsp-vec-load-store.ll
dynamic-stack-realignment.ll
eh-dwarf-cfa.ll
eh-return32.ll
eh-return64.ll
eh.ll
ehframe-indirect.ll
elf_eflags.ll
emergency-spill-slot-near-fp.ll
emit-big-cst.ll
emutls_generic.ll
ex2.ll
extins.ll
f16abs.ll
fabs.ll
fastcc.ll
fcmp.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
fcopysign-f32-f64.ll
Reland "[mips] Fix the target specific instruction verifier"
2017-12-18 15:56:40 +00:00
fcopysign.ll
Reland "[mips] Fix the target specific instruction verifier"
2017-12-18 15:56:40 +00:00
fixdfsf.ll
fmadd1.ll
fneg.ll
fp16-promote.ll
fp16instrinsmc.ll
fp16mix.ll
fp16static.ll
fp64a.ll
fp-indexed-ls.ll
fp-spill-reload.ll
fpbr.ll
fpneeded.ll
fpnotneeded.ll
fpxx.ll
frame-address.ll
frem.ll
global-address.ll
global-pointer-reg.ll
gpopt-explict-section.ll
gpreg-lazy-binding.ll
gprestore.ll
helloworld.ll
hf1_body.ll
hf16_1.ll
hf16call32_body.ll
hf16call32.ll
hfptrcall.ll
i32k.ll
i64arg.ll
imm.ll
indirectcall.ll
init-array.ll
inlineasm64.ll
inlineasm_constraint_m.ll
inlineasm_constraint_R.ll
inlineasm_constraint_ZC.ll
inlineasm_constraint.ll
inlineasm-assembler-directives.ll
inlineasm-cnstrnt-bad-I-1.ll
inlineasm-cnstrnt-bad-J.ll
inlineasm-cnstrnt-bad-K.ll
inlineasm-cnstrnt-bad-L.ll
inlineasm-cnstrnt-bad-N.ll
inlineasm-cnstrnt-bad-O.ll
inlineasm-cnstrnt-bad-P.ll
inlineasm-cnstrnt-reg64.ll
inlineasm-cnstrnt-reg.ll
inlineasm-constraint_ZC_2.ll
inlineasm-operand-code.ll
inlineasmmemop.ll
insn-zero-size-bb.ll
int-to-float-conversion.ll
internalfunc.ll
interrupt-attr-64-error.ll
interrupt-attr-args-error.ll
interrupt-attr-error.ll
interrupt-attr.ll
jtstat.ll
jumptable_labels.ll
l3mc.ll
largeimm1.ll
largeimmprinting.ll
Revert "[mips] Reordering callseq* nodes to be linear"
2017-10-20 14:35:41 +00:00
lazy-binding.ll
lb1.ll
lbu1.ll
lcb2.ll
lcb3c.ll
lcb4a.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lcb5.ll
lh1.ll
lhu1.ll
lit.local.cfg
llcarry.ll
load-store-left-right.ll
long-call-attr.ll
long-call-mcount.ll
[mips] Add test case to check that calls to mcount follow long calls / short calls options. NFC
2017-12-22 13:45:46 +00:00
long-calls.ll
longbranch.ll
[mips] Add partial support for R6 in the long branch pass
2017-12-14 14:55:25 +00:00
lw16-base-reg.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
machineverifier.ll
madd-msub.ll
mature-mc-support.ll
mbrsize4a.ll
memcpy.ll
micromips64r6-unsupported.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
micromips-addiu.ll
micromips-addu16.ll
micromips-and16.ll
micromips-andi.ll
micromips-ase-function-attribute.ll
[mips] Set microMIPS ASE flag
2017-11-24 14:00:47 +00:00
micromips-atomic1.ll
micromips-atomic.ll
micromips-attr.ll
micromips-compact-branches.ll
micromips-compact-jump.ll
micromips-delay-slot-jr.ll
micromips-delay-slot.ll
micromips-directives.ll
micromips-gp-rc.ll
micromips-jal.ll
micromips-li.ll
micromips-load-effective-address.ll
micromips-lwc1-swc1.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
micromips-not16.ll
micromips-or16.ll
micromips-rdhwr-directives.ll
micromips-shift.ll
micromips-subu16.ll
micromips-sw-lw-16.ll
micromips-xor16.ll
mips16_32_1.ll
mips16_32_3.ll
mips16_32_4.ll
mips16_32_5.ll
mips16_32_6.ll
mips16_32_7.ll
mips16_32_8.ll
mips16_32_9.ll
mips16_32_10.ll
mips16_fpret.ll
mips16-hf-attr-2.ll
mips16-hf-attr.ll
mips16ex.ll
mips16fpe.ll
mips64-f128-call.ll
mips64-f128.ll
[mips] Pick the right variant of DINS upfront and enable target instruction verification
2017-09-14 10:58:00 +00:00
mips64-libcall.ll
mips64-sret.ll
mips64directive.ll
mips64ext.ll
mips64extins.ll
[mips] Pick the right variant of DINS upfront and enable target instruction verification
2017-09-14 10:58:00 +00:00
mips64fpimm0.ll
mips64fpldst.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
mips64imm.ll
mips64instrs.ll
mips64intldst.ll
mips64lea.ll
mips64muldiv.ll
mips64shift.ll
[mips] Removal of microMIPS64R6
2017-12-11 11:21:40 +00:00
mips64signextendsesf.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
mips64sinttofpsf.ll
mips-shf-gprel.s
mipslopat.ll
misha.ll
mno-ldc1-sdc1.ll
mul.ll
mulll.ll
mulull.ll
nacl-align.ll
nacl-branch-delay.ll
nacl-reserved-regs.ll
named-register-n32.ll
named-register-n64.ll
named-register-o32.ll
neg1.ll
nmadd.ll
[mips] Correct the instruction predicates for microMIPSr3
2017-10-10 20:52:53 +00:00
no-odd-spreg-msa.ll
no-odd-spreg.ll
nomips16.ll
not1.ll
null-streamer.ll
null.ll
o32_cc_byval.ll
o32_cc_vararg.ll
o32_cc.ll
octeon_popcnt.ll
octeon.ll
optimize-fp-math.ll
optimize-pic-o0.ll
or1.ll
pbqp-reserved-physreg.ll
powif64_16.ll
pr33682.ll
pr33978.ll
pr34975.ll
[mips] Fix analyzeBranch to handle debug data
2017-10-18 14:35:29 +00:00
pr35071.ll
[mips] Fix PR35071
2017-10-26 10:58:36 +00:00
prevent-hoisting.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
private-addr.ll
private.ll
ra-allocatable.ll
rdhwr-directives.ll
rem.ll
remat-immed-load.ll
remu.ll
return_address.ll
return-vector.ll
rotate.ll
s2rem.ll
sb1.ll
sel1c.ll
sel2c.ll
select.ll
selectcc.ll
selectiondag-optlevel.ll
seleq.ll
seleqk.ll
selgek.ll
selgt.ll
selle.ll
selltk.ll
selne.ll
selnek.ll
selpat.ll
selTBteqzCmpi.ll
selTBtnezCmpi.ll
selTBtnezSlti.ll
setcc-se.ll
seteq.ll
seteqz.ll
setge.ll
setgek.ll
setle.ll
setlt.ll
setltk.ll
setne.ll
setuge.ll
setugt.ll
setule.ll
setult.ll
setultk.ll
sh1.ll
shift-parts.ll
simplebr.ll
sint-fp-store_pattern.ll
sitofp-selectcc-opt.ll
sll1.ll
sll2.ll
sll-micromips-r6-encoding.mir
[mips] Handle the emission of microMIPSr6 sll instruction when used as a nop.
2017-12-19 11:16:22 +00:00
slt.ll
small-section-reserve-gp.ll
spill-copy-acreg.ll
sr1.ll
sra1.ll
sra2.ll
srl1.ll
srl2.ll
stack-alignment.ll
stackcoloring.ll
stacksize.ll
start-asm-file.ll
stchar.ll
stldst.ll
sub1.ll
sub2.ll
swzero.ll
tail16.ll
thread-pointer.ll
tls16_2.ll
tls16.ll
tls-alias.ll
tls-models.ll
tls.ll
tnaked.ll
trap1.ll
trap.ll
uitofp.ll
ul1.ll
unalignedload.ll
v2i16tof32.ll
[mips] Provide additional DSP bitconvert patterns
2017-12-13 10:13:35 +00:00
vector-load-store.ll
vector-setcc.ll
weak.ll
whitespace.ll
[mips] fix asmstring of Ext and Ins instructions and mips16 JALRC/JRC
2017-11-27 14:25:36 +00:00
xor1.ll
xray-mips-attribute-instrumentation.ll
xray-section-group.ll
[XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map
2017-09-14 07:08:23 +00:00
zeroreg.ll
