Sanjay Patel ecdd92802f [DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X ... We get the simple cases of this via demanded elements and other folds, but that doesn't work if the values have >1 use, so add a dedicated match for the pattern. We already have this transform in IR, but it doesn't help the motivating x86 tests (based on PR42024) because the shuffles don't exist until after legalization and other combines have happened. The AArch64 test shows a minimal IR example of the problem. Differential Revision: https://reviews.llvm.org/D75348		2020-03-01 09:10:25 -05:00
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AArch64	[DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X	2020-03-01 09:10:25 -05:00
AMDGPU	[AMDGPU] Remove dubious logic in bidirectional list scheduler	2020-02-28 21:35:34 +00:00
ARC
ARM	[DAGCombine] Fix alias analysis for unaligned accesses	2020-02-28 18:44:36 +00:00
AVR
BPF
Generic
Hexagon	[Hexagon] Map dcfetch intrinsic to Y2_dcfetchbo, not Y2_dcfetch	2020-02-28 14:19:20 -06:00
Inputs
Lanai
Mips
MIR	Revert "[ARM] Add CPSR as an implicit use of t2IT"	2020-02-27 15:43:44 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Move .got2/.toc logic from PPCLinuxAsmPrinter::doFinalization() to emitEndOfAsmFile()	2020-02-29 17:12:36 -08:00
RISCV	[RISCV] Compress instructions based on function features	2020-02-28 11:52:55 +00:00
SPARC
SystemZ
Thumb
Thumb2	Revert "[NFC][ARM] Update test"	2020-02-28 09:14:50 -08:00
VE
WebAssembly
WinCFGuard
WinEH
X86	[DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X	2020-03-01 09:10:25 -05:00
XCore