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ad5400fa72
for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. llvm-svn: 133337
29 lines
880 B
LLVM
29 lines
880 B
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
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; rdar://7396984
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@str = private constant [28 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1
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define void @t(i32 %count) ssp nounwind {
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entry:
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; CHECK: t:
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; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip)
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; CHECK: movups L_str(%rip), %xmm0
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%tmp0 = alloca [60 x i8], align 1
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%tmp1 = getelementptr inbounds [60 x i8]* %tmp0, i64 0, i64 0
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br label %bb1
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bb1:
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; CHECK: LBB0_1:
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; CHECK: movaps %xmm0, (%rsp)
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%tmp2 = phi i32 [ %tmp3, %bb1 ], [ 0, %entry ]
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp1, i8* getelementptr inbounds ([28 x i8]* @str, i64 0, i64 0), i64 28, i32 1, i1 false)
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%tmp3 = add i32 %tmp2, 1
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%tmp4 = icmp eq i32 %tmp3, %count
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br i1 %tmp4, label %bb2, label %bb1
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bb2:
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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