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1431b3c2f5
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
84 lines
1.6 KiB
LLVM
84 lines
1.6 KiB
LLVM
; Test matching operands with the GPR constraint "r".
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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define void @f1(i32 *%dst) {
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; CHECK: f1:
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; CHECK: lhi %r0, 100
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; CHECK: blah %r0
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; CHECK: st %r0, 0(%r2)
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; CHECK: br %r14
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%val = call i32 asm "blah $0", "=r,0" (i8 100)
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store i32 %val, i32 *%dst
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ret void
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}
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define void @f2(i32 *%dst) {
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; CHECK: f2:
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; CHECK: lhi %r0, 101
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; CHECK: blah %r0
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; CHECK: st %r0, 0(%r2)
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; CHECK: br %r14
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%val = call i32 asm "blah $0", "=r,0" (i16 101)
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store i32 %val, i32 *%dst
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ret void
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}
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define void @f3(i32 *%dst) {
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; CHECK: f3:
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; CHECK: lhi %r0, 102
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; CHECK: blah %r0
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; CHECK: st %r0, 0(%r2)
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; CHECK: br %r14
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%val = call i32 asm "blah $0", "=r,0" (i32 102)
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store i32 %val, i32 *%dst
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ret void
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}
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; FIXME: this uses "lhi %r0, 103", but should use "lghi %r0, 103".
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define void @f4(i32 *%dst) {
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; CHECK: f4:
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; CHECK: blah %r0
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; CHECK: st %r0, 0(%r2)
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; CHECK: br %r14
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%val = call i32 asm "blah $0", "=r,0" (i64 103)
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store i32 %val, i32 *%dst
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ret void
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}
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define i64 @f5() {
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; CHECK: f5:
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; CHECK: lghi %r2, 104
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; CHECK: blah %r2
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; CHECK: br %r14
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%val = call i64 asm "blah $0", "=r,0" (i8 104)
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ret i64 %val
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}
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define i64 @f6() {
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; CHECK: f6:
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; CHECK: lghi %r2, 105
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; CHECK: blah %r2
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; CHECK: br %r14
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%val = call i64 asm "blah $0", "=r,0" (i16 105)
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ret i64 %val
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}
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define i64 @f7() {
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; CHECK: f7:
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; CHECK: lghi %r2, 106
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; CHECK: blah %r2
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; CHECK: br %r14
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%val = call i64 asm "blah $0", "=r,0" (i32 106)
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ret i64 %val
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}
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define i64 @f8() {
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; CHECK: f8:
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; CHECK: lghi %r2, 107
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; CHECK: blah %r2
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; CHECK: br %r14
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%val = call i64 asm "blah $0", "=r,0" (i64 107)
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ret i64 %val
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}
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