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The bad sorting caused a misaligned basic block when building 176.vpr in ARM mode. <rdar://problem/10594653> llvm-svn: 146767
27 lines
845 B
LLVM
27 lines
845 B
LLVM
; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target triple = "thumbv7-apple-ios"
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; The double in the constant pool is 8-byte aligned, forcing the function
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; alignment.
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; CHECK: .align 3
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; CHECK: func
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;
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; Constant pool with 8-byte entry before 4-byte entry:
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; CHECK: .align 3
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; CHECK: LCPI
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; CHECK: .long 2370821947
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; CHECK: .long 1080815255
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; CHECK: LCPI
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; CHECK: .long 1123477881
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define void @func(float* nocapture %x, double* nocapture %y) nounwind ssp {
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entry:
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%0 = load float* %x, align 4
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%add = fadd float %0, 0x405EDD2F20000000
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store float %add, float* %x, align 4
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%1 = load double* %y, align 4
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%add1 = fadd double %1, 2.234560e+02
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store double %add1, double* %y, align 4
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ret void
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}
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