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594231af66
This should *actually* fix PR30244. This cranks up the workaround for PR30188 so that we never sink loads or stores of allocas. The idea is that these should be removed by SROA/Mem2Reg, and any movement of them may well confuse SROA or just cause unwanted code churn. It's not ideal that the midend should be crippled like this, but that unwanted churn can really cause significant regressions in important workloads (tsan). llvm-svn: 281162
30 lines
796 B
LLVM
30 lines
796 B
LLVM
; RUN: opt < %s -mem2reg -simplifycfg -S | FileCheck %s
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define i32 @test(i32 %x) {
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; CHECK-LABEL: @test
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entry:
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%y = alloca i32, align 4
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%tobool = icmp ne i32 %x, 0
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br i1 %tobool, label %if.then, label %if.else
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if.then:
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; CHECK-LABEL: if.then:
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; CHECK: [[ASM1:%.*]] = call i32 asm "mov $0, #1", "=r"()
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%tmp1 = call i32 asm "mov $0, #1", "=r"() nounwind readnone
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store i32 %tmp1, i32* %y, align 4
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br label %if.end
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if.else:
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; CHECK-LABEL: if.else:
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; CHECK: [[ASM2:%.*]] = call i32 asm "mov $0, #2", "=r"()
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%tmp2 = call i32 asm "mov $0, #2", "=r"() nounwind readnone
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store i32 %tmp2, i32* %y, align 4
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br label %if.end
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if.end:
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; CHECK-LABEL: if.end:
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; CHECK: {{%.*}} = phi i32 [ [[ASM1]], %if.then ], [ [[ASM2]], %if.else ]
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%tmp3 = load i32, i32* %y, align 4
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ret i32 %tmp3
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}
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