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342e72a308
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. llvm-svn: 225277
30 lines
881 B
LLVM
30 lines
881 B
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}br_i1_phi:
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; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
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; SI: s_and_saveexec_b64
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; SI: s_xor_b64
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; SI: v_mov_b32_e32 [[REG]], -1{{$}}
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; SI: v_cmp_ne_i32_e64 {{s\[[0-9]+:[0-9]+\]}}, [[REG]], 0
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; SI: s_and_saveexec_b64
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; SI: s_xor_b64
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; SI: s_endpgm
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define void @br_i1_phi(i32 %arg, i1 %arg1) #0 {
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bb:
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br i1 %arg1, label %bb2, label %bb3
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bb2: ; preds = %bb
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br label %bb3
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bb3: ; preds = %bb2, %bb
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%tmp = phi i1 [ true, %bb2 ], [ false, %bb ]
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br i1 %tmp, label %bb4, label %bb6
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bb4: ; preds = %bb3
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%tmp5 = mul i32 undef, %arg
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br label %bb6
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bb6: ; preds = %bb4, %bb3
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ret void
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}
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