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llvm-mirror/test/MC/Mips/mips5
Daniel Sanders 85d824c210 Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
It causes a number of regressions when -fintegrated-as is enabled. This happens
because there are codegen-only instructions that incorrectly uses the first
operand as the encoding for the $fcc register. The regressions do not occur when
-via-file-asm is also given.

llvm-svn: 215847
2014-08-17 19:47:47 +00:00
..
invalid-mips32.s [mips] SYNC $stype instruction was added in Mips32 2014-06-18 17:10:30 +00:00
invalid-mips64.s [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
invalid-mips64r2-xfail.s [mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2 2014-05-14 15:35:03 +00:00
invalid-mips64r2.s [mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2 2014-05-14 15:35:03 +00:00
valid-xfail.s Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register... 2014-08-17 19:47:47 +00:00
valid.s Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register... 2014-08-17 19:47:47 +00:00