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eb66b33867
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
105 lines
3.7 KiB
C++
105 lines
3.7 KiB
C++
//===- MC/MCRegisterInfo.cpp - Target Register Description ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements MCRegisterInfo functions.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <algorithm>
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#include <cassert>
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#include <cstdint>
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using namespace llvm;
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unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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const MCRegisterClass *RC) const {
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for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
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if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
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return *Supers;
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return 0;
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}
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unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
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assert(Idx && Idx < getNumSubRegIndices() &&
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"This is not a subregister index");
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// Get a pointer to the corresponding SubRegIndices list. This list has the
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// name of each sub-register in the same order as MCSubRegIterator.
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const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
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for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
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if (*SRI == Idx)
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return *Subs;
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return 0;
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}
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unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
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assert(SubReg && SubReg < getNumRegs() && "This is not a register");
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// Get a pointer to the corresponding SubRegIndices list. This list has the
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// name of each sub-register in the same order as MCSubRegIterator.
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const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
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for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
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if (*Subs == SubReg)
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return *SRI;
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return 0;
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}
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unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const {
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assert(Idx && Idx < getNumSubRegIndices() &&
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"This is not a subregister index");
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return SubRegIdxRanges[Idx].Size;
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}
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unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const {
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assert(Idx && Idx < getNumSubRegIndices() &&
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"This is not a subregister index");
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return SubRegIdxRanges[Idx].Offset;
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}
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int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
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const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs;
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unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
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if (!M)
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return -1;
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DwarfLLVMRegPair Key = { RegNum, 0 };
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const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
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if (I == M+Size || I->FromReg != RegNum)
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return -1;
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return I->ToReg;
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}
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int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
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const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs;
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unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
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if (!M)
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return -1;
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DwarfLLVMRegPair Key = { RegNum, 0 };
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const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
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assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
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return I->ToReg;
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}
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int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
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const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
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if (I == L2SEHRegs.end()) return (int)RegNum;
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return I->second;
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}
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int MCRegisterInfo::getCodeViewRegNum(unsigned RegNum) const {
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if (L2CVRegs.empty())
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report_fatal_error("target does not implement codeview register mapping");
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const DenseMap<unsigned, int>::const_iterator I = L2CVRegs.find(RegNum);
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if (I == L2CVRegs.end())
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report_fatal_error("unknown codeview register");
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return I->second;
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}
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