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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
22 lines
846 B
LLVM
22 lines
846 B
LLVM
; RUN: llc < %s -march arm64 -mcpu=cyclone | FileCheck %s
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; <rdar://problem/11294426>
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@b = private unnamed_addr constant [3 x i32] [i32 1768775988, i32 1685481784, i32 1836253201], align 4
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; The important thing for this test is that we need an unaligned load of `l_b'
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; ("ldr w2, [x1, #8]" in this case).
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; CHECK: adrp x[[PAGE:[0-9]+]], {{l_b@PAGE|.Lb}}
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; CHECK: add x[[ADDR:[0-9]+]], x[[PAGE]], {{l_b@PAGEOFF|:lo12:.Lb}}
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; CHECK-NEXT: ldr [[VAL:w[0-9]+]], [x[[ADDR]], #8]
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; CHECK-NEXT: str [[VAL]], [x0, #8]
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; CHECK-NEXT: ldr [[VAL2:x[0-9]+]], [x[[ADDR]]]
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; CHECK-NEXT: str [[VAL2]], [x0]
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define void @foo(i8* %a) {
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast ([3 x i32]* @b to i8*), i64 12, i32 4, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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