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12cdca9076
Summary: We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode. I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features. Fixes PR36202 Reviewers: RKSimon, echristo, bkramer Reviewed By: echristo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42824 llvm-svn: 324106
38 lines
1.7 KiB
ArmAsm
38 lines
1.7 KiB
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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// CHECK: vpmultishiftqb xmm1, xmm2, qword ptr [rcx]{1to2}
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// CHECK: encoding: [0x62,0xf2,0xed,0x18,0x83,0x09]
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vpmultishiftqb xmm1, xmm2, qword ptr [rcx]{1to2}
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// CHECK: vpmultishiftqb xmm1 {k1}, xmm2, qword ptr [rcx]{1to2}
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// CHECK: encoding: [0x62,0xf2,0xed,0x19,0x83,0x09]
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vpmultishiftqb xmm1 {k1}, xmm2, qword ptr [rcx]{1to2}
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// CHECK: vpmultishiftqb xmm1 {k1} {z}, xmm2, qword ptr [rcx]{1to2}
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// CHECK: encoding: [0x62,0xf2,0xed,0x99,0x83,0x09]
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vpmultishiftqb xmm1 {k1} {z}, xmm2, qword ptr [rcx]{1to2}
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// CHECK: vpmultishiftqb ymm1, ymm2, qword ptr [rcx]{1to4}
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// CHECK: encoding: [0x62,0xf2,0xed,0x38,0x83,0x09]
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vpmultishiftqb ymm1, ymm2, qword ptr [rcx]{1to4}
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// CHECK: vpmultishiftqb ymm1 {k1}, ymm2, qword ptr [rcx]{1to4}
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// CHECK: encoding: [0x62,0xf2,0xed,0x39,0x83,0x09]
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vpmultishiftqb ymm1 {k1}, ymm2, qword ptr [rcx]{1to4}
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// CHECK: vpmultishiftqb ymm1 {k1} {z}, ymm2, qword ptr [rcx]{1to4}
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// CHECK: encoding: [0x62,0xf2,0xed,0xb9,0x83,0x09]
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vpmultishiftqb ymm1 {k1} {z}, ymm2, qword ptr [rcx]{1to4}
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// CHECK: vpmultishiftqb zmm1, zmm2, qword ptr [rcx]{1to8}
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// CHECK: encoding: [0x62,0xf2,0xed,0x58,0x83,0x09]
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vpmultishiftqb zmm1, zmm2, qword ptr [rcx]{1to8}
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// CHECK: vpmultishiftqb zmm1 {k1}, zmm2, qword ptr [rcx]{1to8}
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// CHECK: encoding: [0x62,0xf2,0xed,0x59,0x83,0x09]
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vpmultishiftqb zmm1 {k1}, zmm2, qword ptr [rcx]{1to8}
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// CHECK: vpmultishiftqb zmm1 {k1} {z}, zmm2, qword ptr [rcx]{1to8}
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// CHECK: encoding: [0x62,0xf2,0xed,0xd9,0x83,0x09]
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vpmultishiftqb zmm1 {k1} {z}, zmm2, qword ptr [rcx]{1to8}
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