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llvm-mirror/test/CodeGen
Andrew Trick e67db7b7b2 Fix PR18572 - llc crash during GenericScheduler::initPolicy().
Generalized the heuristic that looks at the (very rough) size of the
register file before enabling regpressure tracking.

llvm-svn: 199766
2014-01-21 21:27:37 +00:00
..
AArch64 [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT. 2014-01-21 01:48:52 +00:00
ARM Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN. 2014-01-20 17:14:48 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Remove a failing test to get the buildbots back to green. 2014-01-06 00:43:09 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips Fix PR18572 - llc crash during GenericScheduler::initPolicy(). 2014-01-21 21:27:37 +00:00
MSP430
NVPTX [NVPTX] Add missing patterns for div.approx with immediate denominator 2014-01-21 14:40:05 +00:00
PowerPC Fix pointer info on PPC byval stores 2014-01-21 20:15:58 +00:00
R600 Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00
SPARC Always let value types influence register classes. 2014-01-14 06:18:38 +00:00
SystemZ [SystemZ] Flesh out stackrestore test (frame-11.ll) 2014-01-13 15:44:44 +00:00
Thumb Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00
Thumb2 Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks 2014-01-13 18:47:54 +00:00
X86 [X86] Teach how to combine a vselect into a movss/movsd 2014-01-20 19:35:22 +00:00
XCore Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00