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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
102 lines
3.2 KiB
LLVM
102 lines
3.2 KiB
LLVM
; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
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define float @test_fminv_v2f32(<2 x float> %in) {
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; CHECK: test_fminv_v2f32:
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; CHECK: fminp s0, v0.2s
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%min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in)
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ret float %min
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}
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define float @test_fminv_v4f32(<4 x float> %in) {
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; CHECK: test_fminv_v4f32:
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; CHECK: fminv s0, v0.4s
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%min = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %in)
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ret float %min
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}
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define double @test_fminv_v2f64(<2 x double> %in) {
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; CHECK: test_fminv_v2f64:
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; CHECK: fminp d0, v0.2d
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%min = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> %in)
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ret double %min
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}
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declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>)
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declare float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float>)
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declare double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double>)
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define float @test_fmaxv_v2f32(<2 x float> %in) {
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; CHECK: test_fmaxv_v2f32:
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; CHECK: fmaxp s0, v0.2s
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%max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in)
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ret float %max
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}
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define float @test_fmaxv_v4f32(<4 x float> %in) {
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; CHECK: test_fmaxv_v4f32:
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; CHECK: fmaxv s0, v0.4s
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%max = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %in)
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ret float %max
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}
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define double @test_fmaxv_v2f64(<2 x double> %in) {
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; CHECK: test_fmaxv_v2f64:
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; CHECK: fmaxp d0, v0.2d
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%max = call double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double> %in)
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ret double %max
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}
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declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>)
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declare float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float>)
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declare double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double>)
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define float @test_fminnmv_v2f32(<2 x float> %in) {
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; CHECK: test_fminnmv_v2f32:
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; CHECK: fminnmp s0, v0.2s
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%minnm = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> %in)
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ret float %minnm
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}
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define float @test_fminnmv_v4f32(<4 x float> %in) {
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; CHECK: test_fminnmv_v4f32:
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; CHECK: fminnmv s0, v0.4s
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%minnm = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %in)
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ret float %minnm
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}
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define double @test_fminnmv_v2f64(<2 x double> %in) {
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; CHECK: test_fminnmv_v2f64:
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; CHECK: fminnmp d0, v0.2d
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%minnm = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in)
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ret double %minnm
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}
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declare float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float>)
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declare float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float>)
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declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>)
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define float @test_fmaxnmv_v2f32(<2 x float> %in) {
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; CHECK: test_fmaxnmv_v2f32:
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; CHECK: fmaxnmp s0, v0.2s
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%maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in)
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ret float %maxnm
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}
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define float @test_fmaxnmv_v4f32(<4 x float> %in) {
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; CHECK: test_fmaxnmv_v4f32:
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; CHECK: fmaxnmv s0, v0.4s
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%maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %in)
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ret float %maxnm
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}
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define double @test_fmaxnmv_v2f64(<2 x double> %in) {
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; CHECK: test_fmaxnmv_v2f64:
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; CHECK: fmaxnmp d0, v0.2d
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%maxnm = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in)
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ret double %maxnm
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}
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declare float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float>)
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declare float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float>)
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declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>)
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