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0384d3478f
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
llvm-svn: 221350
49 lines
1.4 KiB
LLVM
49 lines
1.4 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare i32 @llvm.AMDGPU.abs(i32) nounwind readnone
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; Legacy name
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declare i32 @llvm.AMDIL.abs.i32(i32) nounwind readnone
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; FUNC-LABEL: {{^}}s_abs_i32:
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; SI: s_sub_i32
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; SI: s_max_i32
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; SI: s_endpgm
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; EG: SUB_INT
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; EG: MAX_INT
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define void @s_abs_i32(i32 addrspace(1)* %out, i32 %src) nounwind {
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%abs = call i32 @llvm.AMDGPU.abs(i32 %src) nounwind readnone
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store i32 %abs, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_abs_i32:
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; SI: v_sub_i32_e32
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; SI: v_max_i32_e32
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; SI: s_endpgm
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; EG: SUB_INT
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; EG: MAX_INT
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define void @v_abs_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
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%val = load i32 addrspace(1)* %src, align 4
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%abs = call i32 @llvm.AMDGPU.abs(i32 %val) nounwind readnone
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store i32 %abs, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}abs_i32_legacy_amdil:
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; SI: v_sub_i32_e32
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; SI: v_max_i32_e32
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; SI: s_endpgm
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; EG: SUB_INT
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; EG: MAX_INT
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define void @abs_i32_legacy_amdil(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
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%val = load i32 addrspace(1)* %src, align 4
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%abs = call i32 @llvm.AMDIL.abs.i32(i32 %val) nounwind readnone
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store i32 %abs, i32 addrspace(1)* %out, align 4
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ret void
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}
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