1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 04:52:54 +02:00
llvm-mirror/lib/Target/AMDGPU/Disassembler
Sam Kolton 48e96ee80f [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions
Summary:
1. Instruction V_CVT_U32_F32 allow omod operand (see SIInstrInfo.td:1435). In fact this operand shouldn't be allowed here. This fix checks if SDWA pseudo instruction has OMod operand and then copy it.
2. There were several problems with support of VOPC instructions in SDWA peephole pass.

Reviewers: tstellar, arsenm, vpykhtin, airlied, kzhuravl

Subscribers: wdng, nhaehnle, yaxunl, dstuttard, tpr, sarnex, t-tye

Differential Revision: https://reviews.llvm.org/D34626

llvm-svn: 306413
2017-06-27 15:02:23 +00:00
..
AMDGPUDisassembler.cpp [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions 2017-06-27 15:02:23 +00:00
AMDGPUDisassembler.h [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
CMakeLists.txt
LLVMBuild.txt