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llvm-mirror/test/CodeGen/AMDGPU/setcc64.ll
Tom Stellard 24f53ac119 AMDGPU/SI: Enable lanemask tracking in misched
Summary:
This results in higher register usage, but should make it easier for
the compiler to hide latency.

This pass is a prerequisite for some more scheduler improvements, and I
think the increase register usage with this patch is acceptable, because
when combined with the scheduler improvements, the total register usage
will decrease.

shader-db stats:

2382 shaders in 478 tests
Totals:
SGPRS: 48672 -> 49088 (0.85 %)
VGPRS: 34148 -> 34847 (2.05 %)
Code Size: 1285816 -> 1289128 (0.26 %) bytes
LDS: 28 -> 28 (0.00 %) blocks
Scratch: 492544 -> 573440 (16.42 %) bytes per wave
Max Waves: 6856 -> 6846 (-0.15 %)
Wait states: 0 -> 0 (0.00 %)

Depends on D18451

Reviewers: nhaehnle, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18452

llvm-svn: 264876
2016-03-30 16:35:09 +00:00

260 lines
6.3 KiB
LLVM

;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
; XXX: Merge this into setcc, once R600 supports 64-bit operations
;;;==========================================================================;;;
;; Double comparisons
;;;==========================================================================;;;
; FUNC-LABEL: {{^}}f64_oeq:
; SI: v_cmp_eq_f64
define void @f64_oeq(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp oeq double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ogt:
; SI: v_cmp_gt_f64
define void @f64_ogt(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ogt double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_oge:
; SI: v_cmp_ge_f64
define void @f64_oge(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp oge double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_olt:
; SI: v_cmp_lt_f64
define void @f64_olt(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp olt double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ole:
; SI: v_cmp_le_f64
define void @f64_ole(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ole double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_one:
; SI: v_cmp_lg_f64_e32 vcc
; SI: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
define void @f64_one(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp one double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ord:
; SI: v_cmp_o_f64
define void @f64_ord(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ord double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ueq:
; SI: v_cmp_nlg_f64_e32 vcc
; SI: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
define void @f64_ueq(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ueq double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ugt:
; SI: v_cmp_nle_f64_e32 vcc
; SI: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
define void @f64_ugt(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ugt double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_uge:
; SI: v_cmp_nlt_f64_e32 vcc
; SI: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
define void @f64_uge(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp uge double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ult:
; SI: v_cmp_nge_f64_e32 vcc
; SI: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
define void @f64_ult(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ult double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_ule:
; SI: v_cmp_ngt_f64_e32 vcc
; SI: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
define void @f64_ule(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp ule double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_une:
; SI: v_cmp_neq_f64
define void @f64_une(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp une double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}f64_uno:
; SI: v_cmp_u_f64
define void @f64_uno(i32 addrspace(1)* %out, double %a, double %b) {
entry:
%0 = fcmp uno double %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
;;;==========================================================================;;;
;; 64-bit integer comparisons
;;;==========================================================================;;;
; FUNC-LABEL: {{^}}i64_eq:
; SI: v_cmp_eq_i64
define void @i64_eq(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp eq i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_ne:
; SI: v_cmp_ne_i64
define void @i64_ne(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp ne i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_ugt:
; SI: v_cmp_gt_u64
define void @i64_ugt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp ugt i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_uge:
; SI: v_cmp_ge_u64
define void @i64_uge(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp uge i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_ult:
; SI: v_cmp_lt_u64
define void @i64_ult(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp ult i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_ule:
; SI: v_cmp_le_u64
define void @i64_ule(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp ule i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_sgt:
; SI: v_cmp_gt_i64
define void @i64_sgt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp sgt i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_sge:
; SI: v_cmp_ge_i64
define void @i64_sge(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp sge i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_slt:
; SI: v_cmp_lt_i64
define void @i64_slt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp slt i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}i64_sle:
; SI: v_cmp_le_i64
define void @i64_sle(i32 addrspace(1)* %out, i64 %a, i64 %b) {
entry:
%0 = icmp sle i64 %a, %b
%1 = sext i1 %0 to i32
store i32 %1, i32 addrspace(1)* %out
ret void
}