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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/TableGen
Daniel Sanders d400a290e5 [globalisel][tablegen] Simplify named operand/operator lookups and fix a wrong-code bug this revealed.
Summary:
Operand variable lookups are now performed by the RuleMatcher rather than
searching the whole matcher hierarchy for a match. This revealed a wrong-code
bug that currently affects ARM and X86 where patterns that use a variable more
than once in the match pattern will be imported but won't check that the
operands are identical. This can cause the tablegen-erated matcher to
accept matches that should be rejected.

Depends on D36569

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Subscribers: aemerson, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D36618

llvm-svn: 315780
2017-10-14 00:31:58 +00:00
..
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
AnonDefinitionOnDemand.td
AsmPredicateCondsEmission.td
AsmVariant.td [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. This is required after r307358. 2017-07-07 05:50:45 +00:00
BitOffsetDecoder.td
BitsInit.td
BitsInitOverflow.td
cast-list-initializer.td
cast.td
ClassInstanceValue.td
ConcatenatedSubregs.td Address r311914 review comments 2017-08-28 20:11:27 +00:00
CStyleComment.td
Dag.td
defmclass.td
DefmInherit.td
DefmInsideMultiClass.td
DuplicateFieldValues.td [tablegen] Delete duplicates from a vector without skipping elements 2016-12-01 19:38:50 +00:00
eq.td
eqbit.td
FieldAccess.td
foreach.td
ForeachList.td
ForeachLoop.td
ForwardRef.td
GeneralList.td
GlobalISelEmitter.td [globalisel][tablegen] Simplify named operand/operator lookups and fix a wrong-code bug this revealed. 2017-10-14 00:31:58 +00:00
HwModeSelect.td TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
if-empty-list-arg.td
if.td
ifbit.td
Include.inc
Include.td
IntBitInit.td
intrinsic-long-name.td [MVT][SVE] Scalable vector MVTs (2/3) 2017-04-20 13:36:58 +00:00
intrinsic-struct.td [TableGen] Allow intrinsics to have up to 8 return values. 2017-10-12 17:40:00 +00:00
intrinsic-varargs.td [MVT] add v1i1 MVT 2017-05-18 11:29:41 +00:00
LazyChange.td
LetInsideMultiClasses.td
lisp.td
list-element-bitref.td
ListArgs.td
ListArgsSimple.td
listconcat.td
ListConversion.td
ListManip.td
ListOfList.td
ListSlices.td
lit.local.cfg
LoLoL.td
math.td
MultiClass.td
MultiClassDefName.td
MultiClassInherit.td
MultiPat.td
nested-comment.td
NestedForeach.td
Paste.td
pr8330.td
RegisterBankEmitter.td TableGen: Fix infinite recursion in RegisterBankEmitter 2017-01-30 15:07:01 +00:00
RegisterEncoder.td [TableGen] Add EncoderMethod to RegisterOperand 2017-05-15 10:13:07 +00:00
SetTheory.td
SiblingForeach.td
Slice.td
strconcat.td
String.td
subst2.td
subst.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td
TemplateArgRename.td
Tree.td
TreeNames.td
trydecode-emission2.td
trydecode-emission3.td
trydecode-emission.td
TwoLevelName.td
UnsetBitInit.td
UnterminatedComment.td Make shell redirection construct portable 2017-07-12 13:24:46 +00:00
usevalname.td
ValidIdentifiers.td