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llvm-mirror/test
Simon Pilgrim e7753c5600 [DAGCombiner] Enable srem(x.y) -> urem(x,y) combine for vectors
SelectionDAG::SignBitIsZero (via SelectionDAG::computeKnownBits) has supported vectors since rL280927

llvm-svn: 285123
2016-10-25 21:20:18 +00:00
..
Analysis Fix regression from my recent GlobalsAA fix. 2016-10-24 21:47:44 +00:00
Assembler
Bindings
Bitcode
BugPoint Add -strip-nonlinetable-debuginfo capability 2016-10-25 18:44:13 +00:00
CodeGen [DAGCombiner] Enable srem(x.y) -> urem(x,y) combine for vectors 2016-10-25 21:20:18 +00:00
DebugInfo revert: "Remove debug location from common tail when tail-merging" 2016-10-25 20:17:58 +00:00
Demangle
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
LibDriver
Linker
LTO
MC [MC] Fix Various End Of Line Comment checkings 2016-10-24 14:35:29 +00:00
Object nother additional error check for an invalid Mach-O file 2016-10-24 21:15:11 +00:00
ObjectYAML
Other
SymbolRewriter
TableGen
ThinLTO/X86
tools [llvm-cov] Add support for loading coverage from multiple objects 2016-10-25 17:40:55 +00:00
Transforms [InstCombine] Resubmit the combine of A->B->A BitCast and fix for pr27996 2016-10-25 20:43:42 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh