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45d6ddee89
As discussed in D11886, this patch moves the SSE/AVX vector blend folding to instcombiner from PerformINTRINSIC_WO_CHAINCombine (which allows us to remove this completely). InstCombiner already had partial support for this, I just had to add support for zero (ConstantAggregateZero) masks and also the case where both selection inputs were the same (allowing us to ignore the mask). I also moved all the relevant combine tests into InstCombine/blend_x86.ll Differential Revision: http://reviews.llvm.org/D11934 llvm-svn: 244723
146 lines
7.5 KiB
LLVM
146 lines
7.5 KiB
LLVM
; RUN: opt < %s -instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -S | FileCheck %s
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define <2 x double> @constant_blendvpd(<2 x double> %xy, <2 x double> %ab) {
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; CHECK-LABEL: @constant_blendvpd
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; CHECK-NEXT: %1 = select <2 x i1> <i1 true, i1 false>, <2 x double> %ab, <2 x double> %xy
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; CHECK-NEXT: ret <2 x double> %1
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%1 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %xy, <2 x double> %ab, <2 x double> <double 0xFFFFFFFFE0000000, double 0.000000e+00>)
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ret <2 x double> %1
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}
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define <2 x double> @constant_blendvpd_zero(<2 x double> %xy, <2 x double> %ab) {
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; CHECK-LABEL: @constant_blendvpd_zero
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; CHECK-NEXT: ret <2 x double> %xy
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%1 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %xy, <2 x double> %ab, <2 x double> zeroinitializer)
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ret <2 x double> %1
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}
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define <2 x double> @constant_blendvpd_dup(<2 x double> %xy, <2 x double> %sel) {
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; CHECK-LABEL: @constant_blendvpd_dup
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; CHECK-NEXT: ret <2 x double> %xy
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%1 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %xy, <2 x double> %xy, <2 x double> %sel)
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ret <2 x double> %1
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}
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define <4 x float> @constant_blendvps(<4 x float> %xyzw, <4 x float> %abcd) {
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; CHECK-LABEL: @constant_blendvps
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; CHECK-NEXT: %1 = select <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x float> %abcd, <4 x float> %xyzw
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; CHECK-NEXT: ret <4 x float> %1
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%1 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %xyzw, <4 x float> %abcd, <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0xFFFFFFFFE0000000>)
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ret <4 x float> %1
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}
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define <4 x float> @constant_blendvps_zero(<4 x float> %xyzw, <4 x float> %abcd) {
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; CHECK-LABEL: @constant_blendvps_zero
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; CHECK-NEXT: ret <4 x float> %xyzw
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%1 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %xyzw, <4 x float> %abcd, <4 x float> zeroinitializer)
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ret <4 x float> %1
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}
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define <4 x float> @constant_blendvps_dup(<4 x float> %xyzw, <4 x float> %sel) {
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; CHECK-LABEL: @constant_blendvps_dup
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; CHECK-NEXT: ret <4 x float> %xyzw
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%1 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %xyzw, <4 x float> %xyzw, <4 x float> %sel)
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ret <4 x float> %1
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}
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define <16 x i8> @constant_pblendvb(<16 x i8> %xyzw, <16 x i8> %abcd) {
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; CHECK-LABEL: @constant_pblendvb
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; CHECK-NEXT: %1 = select <16 x i1> <i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false>, <16 x i8> %abcd, <16 x i8> %xyzw
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; CHECK-NEXT: ret <16 x i8> %1
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%1 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %xyzw, <16 x i8> %abcd, <16 x i8> <i8 0, i8 0, i8 255, i8 0, i8 255, i8 255, i8 255, i8 0, i8 0, i8 0, i8 255, i8 0, i8 255, i8 255, i8 255, i8 0>)
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ret <16 x i8> %1
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}
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define <16 x i8> @constant_pblendvb_zero(<16 x i8> %xyzw, <16 x i8> %abcd) {
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; CHECK-LABEL: @constant_pblendvb_zero
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; CHECK-NEXT: ret <16 x i8> %xyzw
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%1 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %xyzw, <16 x i8> %abcd, <16 x i8> zeroinitializer)
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ret <16 x i8> %1
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}
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define <16 x i8> @constant_pblendvb_dup(<16 x i8> %xyzw, <16 x i8> %sel) {
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; CHECK-LABEL: @constant_pblendvb_dup
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; CHECK-NEXT: ret <16 x i8> %xyzw
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%1 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %xyzw, <16 x i8> %xyzw, <16 x i8> %sel)
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ret <16 x i8> %1
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}
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define <4 x double> @constant_blendvpd_avx(<4 x double> %xy, <4 x double> %ab) {
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; CHECK-LABEL: @constant_blendvpd_avx
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; CHECK-NEXT: %1 = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x double> %ab, <4 x double> %xy
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; CHECK-NEXT: ret <4 x double> %1
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%1 = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %xy, <4 x double> %ab, <4 x double> <double 0xFFFFFFFFE0000000, double 0.000000e+00, double 0xFFFFFFFFE0000000, double 0.000000e+00>)
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ret <4 x double> %1
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}
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define <4 x double> @constant_blendvpd_avx_zero(<4 x double> %xy, <4 x double> %ab) {
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; CHECK-LABEL: @constant_blendvpd_avx_zero
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; CHECK-NEXT: ret <4 x double> %xy
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%1 = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %xy, <4 x double> %ab, <4 x double> zeroinitializer)
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ret <4 x double> %1
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}
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define <4 x double> @constant_blendvpd_avx_dup(<4 x double> %xy, <4 x double> %sel) {
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; CHECK-LABEL: @constant_blendvpd_avx_dup
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; CHECK-NEXT: ret <4 x double> %xy
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%1 = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %xy, <4 x double> %xy, <4 x double> %sel)
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ret <4 x double> %1
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}
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define <8 x float> @constant_blendvps_avx(<8 x float> %xyzw, <8 x float> %abcd) {
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; CHECK-LABEL: @constant_blendvps_avx
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; CHECK-NEXT: %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false, i1 true>, <8 x float> %abcd, <8 x float> %xyzw
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; CHECK-NEXT: ret <8 x float> %1
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%1 = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %xyzw, <8 x float> %abcd, <8 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0xFFFFFFFFE0000000, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0xFFFFFFFFE0000000>)
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ret <8 x float> %1
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}
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define <8 x float> @constant_blendvps_avx_zero(<8 x float> %xyzw, <8 x float> %abcd) {
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; CHECK-LABEL: @constant_blendvps_avx_zero
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; CHECK-NEXT: ret <8 x float> %xyzw
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%1 = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %xyzw, <8 x float> %abcd, <8 x float> zeroinitializer)
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ret <8 x float> %1
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}
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define <8 x float> @constant_blendvps_avx_dup(<8 x float> %xyzw, <8 x float> %sel) {
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; CHECK-LABEL: @constant_blendvps_avx_dup
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; CHECK-NEXT: ret <8 x float> %xyzw
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%1 = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %xyzw, <8 x float> %xyzw, <8 x float> %sel)
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ret <8 x float> %1
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}
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define <32 x i8> @constant_pblendvb_avx2(<32 x i8> %xyzw, <32 x i8> %abcd) {
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; CHECK-LABEL: @constant_pblendvb_avx2
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; CHECK-NEXT: %1 = select <32 x i1> <i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false>, <32 x i8> %abcd, <32 x i8> %xyzw
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; CHECK-NEXT: ret <32 x i8> %1
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%1 = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> %xyzw, <32 x i8> %abcd,
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<32 x i8> <i8 0, i8 0, i8 255, i8 0, i8 255, i8 255, i8 255, i8 0,
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i8 0, i8 0, i8 255, i8 0, i8 255, i8 255, i8 255, i8 0,
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i8 0, i8 0, i8 255, i8 0, i8 255, i8 255, i8 255, i8 0,
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i8 0, i8 0, i8 255, i8 0, i8 255, i8 255, i8 255, i8 0>)
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ret <32 x i8> %1
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}
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define <32 x i8> @constant_pblendvb_avx2_zero(<32 x i8> %xyzw, <32 x i8> %abcd) {
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; CHECK-LABEL: @constant_pblendvb_avx2_zero
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; CHECK-NEXT: ret <32 x i8> %xyzw
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%1 = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> %xyzw, <32 x i8> %abcd, <32 x i8> zeroinitializer)
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ret <32 x i8> %1
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}
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define <32 x i8> @constant_pblendvb_avx2_dup(<32 x i8> %xyzw, <32 x i8> %sel) {
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; CHECK-LABEL: @constant_pblendvb_avx2_dup
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; CHECK-NEXT: ret <32 x i8> %xyzw
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%1 = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> %xyzw, <32 x i8> %xyzw, <32 x i8> %sel)
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ret <32 x i8> %1
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}
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declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>)
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declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>)
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declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>)
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declare <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8>, <32 x i8>, <32 x i8>)
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declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>)
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declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4 x double>)
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