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e010508942
Implement IR intrinsics for stack tagging. Generated code is very unoptimized for now. Two special intrinsics, llvm.aarch64.irg.sp and llvm.aarch64.tagp are used to implement a tagged stack frame pointer in a virtual register. Differential Revision: https://reviews.llvm.org/D64172 llvm-svn: 366360
35 lines
1.4 KiB
C++
35 lines
1.4 KiB
C++
//===-- AArch64SelectionDAGInfo.h - AArch64 SelectionDAG Info ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the AArch64 subclass for SelectionDAGTargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SELECTIONDAGINFO_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64SELECTIONDAGINFO_H
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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namespace llvm {
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class AArch64SelectionDAGInfo : public SelectionDAGTargetInfo {
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public:
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SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
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SDValue Chain, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align, bool isVolatile,
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MachinePointerInfo DstPtrInfo) const override;
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SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, const SDLoc &dl,
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SDValue Chain, SDValue Op1, SDValue Op2,
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MachinePointerInfo DstPtrInfo,
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bool ZeroData) const override;
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bool generateFMAsInMachineCombiner(CodeGenOpt::Level OptLevel) const override;
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};
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}
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#endif
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