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Simon Pilgrim e8b6f560d2 [X86][AVX512] Avoid bitcasts between scalar and vXi1 bool vectors
AVX512 mask types are often bitcasted to scalar integers for various ops before being bitcast back to be used as a predicate. In many cases we can avoid these KMASK<->GPR transfers and perform equivalent operations on the mask unit.

If the destination mask type is legal, and we can confirm that the scalar op originally came from a mask/vector/float/double type then we should try to avoid the scalar entirely.

This avoids some codegen issues noticed while working on PTEST/MOVMSK improvements.

Partially fixes PR32547 - we don't create a KUNPCK yet, but OR(X,KSHIFTL(Y)) can be handled in a separate patch.

Differential Revision: https://reviews.llvm.org/D81548
2020-06-11 10:22:55 +01:00

57 lines
2.4 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX
; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512
define void @foo(double %arg) {
; CHECK-LABEL: foo:
; CHECK: ## %bb.0: ## %bb
; CHECK-NEXT: vmovq %xmm0, %rax
; CHECK-NEXT: vmovd %eax, %xmm0
; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
; CHECK-NEXT: vmovq %xmm0, %rax
; CHECK-NEXT: movl %eax, (%rax)
; CHECK-NEXT: vmovlps %xmm1, (%rax)
; CHECK-NEXT: retq
bb:
%tmp = bitcast double %arg to i64
%tmp1 = trunc i64 %tmp to i32
%tmp2 = bitcast i32 %tmp1 to float
%tmp3 = insertelement <4 x float> zeroinitializer, float %tmp2, i32 2
%tmp4 = bitcast <4 x float> %tmp3 to <2 x double>
%tmp5 = extractelement <2 x double> %tmp4, i32 0
%tmp6 = extractelement <2 x double> %tmp4, i32 1
%tmp7 = bitcast double %tmp6 to i64
%tmp8 = trunc i64 %tmp7 to i32
store i32 %tmp8, i32* undef, align 4
store double %tmp5, double* undef, align 16
ret void
}
; This used to crash with mask registers on avx512bw targets.
define i32 @bar(double %blah) nounwind {
; AVX-LABEL: bar:
; AVX: ## %bb.0:
; AVX-NEXT: pushq %rbp
; AVX-NEXT: movq %rsp, %rbp
; AVX-NEXT: andq $-32, %rsp
; AVX-NEXT: subq $32, %rsp
; AVX-NEXT: vmovq %xmm0, %rax
; AVX-NEXT: ## kill: def $eax killed $eax killed $rax
; AVX-NEXT: movq %rbp, %rsp
; AVX-NEXT: popq %rbp
; AVX-NEXT: retq
;
; AVX512-LABEL: bar:
; AVX512: ## %bb.0:
; AVX512-NEXT: vmovq %xmm0, %rax
; AVX512-NEXT: ## kill: def $eax killed $eax killed $rax
; AVX512-NEXT: retq
%z = bitcast double %blah to i64
%y = trunc i64 %z to i32
%a = bitcast i32 %y to <32 x i1>
%b = shufflevector <32 x i1> %a, <32 x i1> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%c = bitcast <64 x i1> %b to i64
%d = trunc i64 %c to i32
ret i32 %d
}