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https://github.com/RPCS3/llvm-mirror.git
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2526430a5c
Summary: The old address space inference pass (NVPTXFavorNonGenericAddrSpaces) is unable to convert the address space of a pointer induction variable. This patch adds a new pass called NVPTXInferAddressSpaces that overcomes that limitation using a fixed-point data-flow analysis (see the file header comments for details). The new pass is experimental and not enabled by default. Users can turn it on by setting the -nvptx-use-infer-addrspace flag of llc. Reviewers: jholewinski, tra, jlebar Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D17965 llvm-svn: 263916
43 lines
1.1 KiB
CMake
43 lines
1.1 KiB
CMake
set(LLVM_TARGET_DEFINITIONS NVPTX.td)
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tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(NVPTXCommonTableGen)
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set(NVPTXCodeGen_sources
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NVPTXAllocaHoisting.cpp
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NVPTXAsmPrinter.cpp
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NVPTXAssignValidGlobalNames.cpp
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NVPTXFavorNonGenericAddrSpaces.cpp
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NVPTXFrameLowering.cpp
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NVPTXGenericToNVVM.cpp
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NVPTXISelDAGToDAG.cpp
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NVPTXISelLowering.cpp
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NVPTXImageOptimizer.cpp
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NVPTXInferAddressSpaces.cpp
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NVPTXInstrInfo.cpp
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NVPTXLowerAggrCopies.cpp
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NVPTXLowerKernelArgs.cpp
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NVPTXLowerAlloca.cpp
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NVPTXPeephole.cpp
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NVPTXMCExpr.cpp
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NVPTXPrologEpilogPass.cpp
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NVPTXRegisterInfo.cpp
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NVPTXReplaceImageHandles.cpp
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NVPTXSubtarget.cpp
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NVPTXTargetMachine.cpp
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NVPTXTargetTransformInfo.cpp
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NVPTXUtilities.cpp
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NVVMReflect.cpp
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)
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add_llvm_target(NVPTXCodeGen ${NVPTXCodeGen_sources})
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add_subdirectory(TargetInfo)
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add_subdirectory(InstPrinter)
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add_subdirectory(MCTargetDesc)
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