Matt Arsenault e91ea67fb7 AMDGPU: Fix operand name for v_interp_* ... Other VOP instructions call the output vdst llvm-svn: 288856		2016-12-06 22:29:43 +00:00
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AArch64	[AArch64] Refactor LSE support as feature separate from V8.1a support.	2016-11-30 22:25:24 +00:00
AMDGPU	AMDGPU: Assembler support for exp	2016-12-05 20:42:41 +00:00
ARM	[ARM] Better error message for invalid flag-preserving Thumb1 insts	2016-12-06 12:59:08 +00:00
AsmParser	[AsmParser] Diagnose empty symbol for .set directive	2016-12-01 18:00:36 +00:00
AVR	[AVR] Add all of the machine code test suite	2016-11-09 23:46:25 +00:00
COFF	Emit S_COMPILE3 record once per TU rather than once per function	2016-11-02 21:30:35 +00:00
Disassembler	AMDGPU: Fix operand name for v_interp_*	2016-12-06 22:29:43 +00:00
ELF	Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.	2016-10-27 23:20:19 +00:00
Hexagon	[Hexagon] Fix disassembler crash after r279255	2016-09-09 21:45:00 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.	2016-10-27 23:20:19 +00:00
Markup
Mips	[mips][ias] N32/N64 must not sort the relocation table.	2016-12-05 12:55:19 +00:00
PowerPC	[PPC] Slightly Improve Assembly Parsing errors and add EOL comment	2016-12-05 14:11:03 +00:00
Sparc	Don't pass a Reloc::Model to MC.	2016-05-18 11:58:50 +00:00
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[LMT] Restrict nop length to one	2016-12-01 15:19:10 +00:00