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llvm-mirror/test/Bitcode/vectorInstructions.3.2.ll.bc
Michael Kuperstein 5343bbad35 Ensure bitcode encoding of instructions and their operands stays stable. 
This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators.

Work was done by lama.saba@intel.com.

llvm-svn: 202262
2014-02-26 12:06:36 +00:00

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