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llvm-mirror/test/CodeGen/Thumb2/mul_const.ll
Joerg Sonnenberger 2826f5b278 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.

llvm-svn: 197224
2013-12-13 11:16:00 +00:00

19 lines
368 B
LLVM

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; rdar://7069502
define i32 @t1(i32 %v) nounwind readnone {
entry:
; CHECK-LABEL: t1:
; CHECK: add.w r0, r0, r0, lsl #3
%0 = mul i32 %v, 9
ret i32 %0
}
define i32 @t2(i32 %v) nounwind readnone {
entry:
; CHECK-LABEL: t2:
; CHECK: rsb r0, r0, r0, lsl #3
%0 = mul i32 %v, 7
ret i32 %0
}