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llvm-mirror/test/CodeGen/Thumb2/thumb2-bcc.ll
Joerg Sonnenberger 2826f5b278 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.

llvm-svn: 197224
2013-12-13 11:16:00 +00:00

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607 B
LLVM

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; If-conversion defeats the purpose of this test, which is to check CBZ
; generation, so use memory barrier instruction to make sure it doesn't
; happen and we get actual branches.
define i32 @t1(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: t1:
; CHECK: cbz
%tmp2 = icmp eq i32 %a, 0
br i1 %tmp2, label %cond_false, label %cond_true
cond_true:
fence seq_cst
%tmp5 = add i32 %b, 1
%tmp6 = and i32 %tmp5, %c
ret i32 %tmp6
cond_false:
fence seq_cst
%tmp7 = add i32 %b, -1
%tmp8 = xor i32 %tmp7, %c
ret i32 %tmp8
}