mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
dd53274771
This reverts commit 80a34ae31125aa46dcad47162ba45b152aed968d with fixes. Previously, since bots turning on EXPENSIVE_CHECKS are essentially turning on MachineVerifierPass by default on X86 and the fact that inline-asm-avx-v-constraint-32bit.ll and inline-asm-avx512vl-v-constraint-32bit.ll are not expected to generate functioning machine code, this would go down to `report_fatal_error` in MachineVerifierPass. Here passing `-verify-machineinstrs=0` to make the intent explicit.
28 lines
880 B
YAML
28 lines
880 B
YAML
# RUN: not --crash llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
|
|
# REQUIRES: aarch64-registered-target
|
|
|
|
---
|
|
name: test_memcpy_et_al
|
|
legalized: true
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:_(p0) = G_IMPLICIT_DEF
|
|
%1:_(s64) = G_IMPLICIT_DEF
|
|
%2:_(s1) = G_IMPLICIT_DEF
|
|
|
|
; CHECK: Bad machine code: Expected memcpy intrinsic to have 5 operands
|
|
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memcpy), %0(p0), %0(p0), %1(s64)
|
|
|
|
; CHECK: Bad machine code: Expected memmove intrinsic to have 5 operands
|
|
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memmove), %0(p0), %0(p0), %1(s64)
|
|
|
|
; CHECK: Bad machine code: Expected memset intrinsic to have 5 operands
|
|
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %0(p0), %0(p0), %1(s64)
|
|
|
|
...
|