| .. |
|
AsmParser
|
AArch64: diagnose unrecognized features in .cpu directive.
|
2017-05-15 19:42:15 +00:00 |
|
Disassembler
|
[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2017-01-06 00:30:53 +00:00 |
|
InstPrinter
|
AArch64: lower "fence singlethread" to a pure compiler barrier.
|
2017-04-20 21:57:45 +00:00 |
|
MCTargetDesc
|
[AArch64] Fix a comment to match the code. NFC.
|
2017-05-10 10:51:32 +00:00 |
|
TargetInfo
|
|
|
|
Utils
|
[AArch64AsmParser] rewrite of function parseSysAlias
|
2017-03-03 08:12:47 +00:00 |
|
AArch64.h
|
[AArch64] Remove AArch64AddressTypePromotion pass
|
2017-05-05 16:05:41 +00:00 |
|
AArch64.td
|
[AArch64] Enable FeatureFuseAES on Cortex-A72.
|
2017-05-15 15:15:22 +00:00 |
|
AArch64A53Fix835769.cpp
|
|
|
|
AArch64A57FPLoadBalancing.cpp
|
LiveRegUnits: Add accumulateBackward() function
|
2017-01-21 02:21:04 +00:00 |
|
AArch64AdvSIMDScalarPass.cpp
|
|
|
|
AArch64AsmPrinter.cpp
|
[AArch64]: add 'a' inline asm operand modifier.
|
2017-05-25 19:07:57 +00:00 |
|
AArch64CallingConvention.h
|
|
|
|
AArch64CallingConvention.td
|
SwiftCC: swifterror register cannot be as the base register
|
2017-02-09 01:52:17 +00:00 |
|
AArch64CallLowering.cpp
|
Add extra operand to CALLSEQ_START to keep frame part set up previously
|
2017-05-09 13:35:13 +00:00 |
|
AArch64CallLowering.h
|
[GlobalISel] Use the correct calling conv for calls
|
2017-03-20 14:40:18 +00:00 |
|
AArch64CleanupLocalDynamicTLSPass.cpp
|
|
|
|
AArch64CollectLOH.cpp
|
AArch64CollectLOH: Rewrite as block-local analysis.
|
2017-01-06 19:22:01 +00:00 |
|
AArch64ConditionalCompares.cpp
|
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
|
2017-01-13 09:58:52 +00:00 |
|
AArch64ConditionOptimizer.cpp
|
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
|
2017-01-13 09:58:52 +00:00 |
|
AArch64DeadRegisterDefinitionsPass.cpp
|
|
|
|
AArch64ExpandPseudoInsts.cpp
|
AArch64: Fix cmpxchg O0 expansion
|
2017-05-26 23:48:59 +00:00 |
|
AArch64FastISel.cpp
|
Add extra operand to CALLSEQ_START to keep frame part set up previously
|
2017-05-09 13:35:13 +00:00 |
|
AArch64FrameLowering.cpp
|
LivePhysRegs: Rework constructor + documentation; NFC
|
2017-05-26 21:51:00 +00:00 |
|
AArch64FrameLowering.h
|
|
|
|
AArch64GenRegisterBankInfo.def
|
GlobalISel: fall back gracefully when we can't map an operand's size.
|
2017-02-06 21:57:06 +00:00 |
|
AArch64InstrAtomics.td
|
AArch64: lower "fence singlethread" to a pure compiler barrier.
|
2017-04-20 21:57:45 +00:00 |
|
AArch64InstrFormats.td
|
[globalisel][tablegen] Revise API for ComplexPattern operands to improve flexibility.
|
2017-04-22 15:11:04 +00:00 |
|
AArch64InstrInfo.cpp
|
[AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
|
2017-05-23 19:57:45 +00:00 |
|
AArch64InstrInfo.h
|
[AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
|
2017-05-23 19:57:45 +00:00 |
|
AArch64InstrInfo.td
|
[globalisel][tablegen] Demote OptForSize/OptForMinSize/ForCodeSize to per-function predicates.
|
2017-05-19 11:08:33 +00:00 |
|
AArch64InstructionSelector.cpp
|
[globalisel][tablegen] Compute available feature bits correctly.
|
2017-04-29 17:30:09 +00:00 |
|
AArch64ISelDAGToDAG.cpp
|
[SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDemandedBits
|
2017-04-28 05:31:46 +00:00 |
|
AArch64ISelLowering.cpp
|
Fix signedness of constant. NFC.
|
2017-05-26 12:53:10 +00:00 |
|
AArch64ISelLowering.h
|
Re-commit r302678, fixing PR33053.
|
2017-05-16 21:29:22 +00:00 |
|
AArch64LegalizerInfo.cpp
|
GlobalISel: constrain G_INSERT to inserting just one value per instruction.
|
2017-03-03 23:05:47 +00:00 |
|
AArch64LegalizerInfo.h
|
GlobalISel: legalize va_arg on AArch64.
|
2017-02-15 23:22:50 +00:00 |
|
AArch64LoadStoreOptimizer.cpp
|
[AArch64] Use alias analysis in the load/store optimization pass.
|
2017-03-17 14:19:55 +00:00 |
|
AArch64MachineFunctionInfo.h
|
[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2017-01-06 00:30:53 +00:00 |
|
AArch64MacroFusion.cpp
|
[AArch64] Make instruction fusion more aggressive.
|
2017-05-23 09:33:34 +00:00 |
|
AArch64MacroFusion.h
|
[CodeGen] Move MacroFusion to the target
|
2017-02-01 02:54:34 +00:00 |
|
AArch64MCInstLower.cpp
|
|
|
|
AArch64MCInstLower.h
|
|
|
|
AArch64PBQPRegAlloc.cpp
|
|
|
|
AArch64PBQPRegAlloc.h
|
|
|
|
AArch64PerfectShuffle.h
|
|
|
|
AArch64PromoteConstant.cpp
|
|
|
|
AArch64RedundantCopyElimination.cpp
|
[AArch64][Redundant Copy Elim] Add support for CMN and shifted imm.
|
2017-03-06 21:20:00 +00:00 |
|
AArch64RegisterBankInfo.cpp
|
[AArch64][RegisterBankInfo] Change the default mapping of fp stores.
|
2017-05-10 15:19:41 +00:00 |
|
AArch64RegisterBankInfo.h
|
[RegisterBankInfo] Uniquely allocate instruction mapping.
|
2017-05-05 22:48:22 +00:00 |
|
AArch64RegisterBanks.td
|
Re-commit: [globalisel] Tablegen-erate current Register Bank Information
|
2017-01-19 11:15:55 +00:00 |
|
AArch64RegisterInfo.cpp
|
AArch64RegisterInfo: Simplify getReservedReg(); NFC
|
2017-02-02 02:23:25 +00:00 |
|
AArch64RegisterInfo.h
|
AArch64: Enable post-ra liveness updates
|
2016-12-16 23:55:43 +00:00 |
|
AArch64RegisterInfo.td
|
|
|
|
AArch64SchedA53.td
|
[MachineScheduler] Reference the correct header.
|
2017-03-26 21:27:21 +00:00 |
|
AArch64SchedA57.td
|
[AArch64] Add new subtarget feature to fuse AES crypto operations
|
2017-02-01 02:54:39 +00:00 |
|
AArch64SchedA57WriteRes.td
|
[AArch64] Cortex-A57 FDIV/FSQRT scheduling fix (W-unit)
|
2016-12-23 12:51:41 +00:00 |
|
AArch64SchedCyclone.td
|
|
|
|
AArch64SchedFalkor.td
|
[AArch64][Falkor] Fix number of microops for WriteSTIdx missed in r300892.
|
2017-04-21 13:37:01 +00:00 |
|
AArch64SchedFalkorDetails.td
|
[AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
|
2017-05-23 19:57:45 +00:00 |
|
AArch64SchedFalkorWriteRes.td
|
[AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
|
2017-05-23 19:57:45 +00:00 |
|
AArch64SchedKryo.td
|
|
|
|
AArch64SchedKryoDetails.td
|
[AArch64] Refine Kryo Machine Model
|
2017-01-26 20:10:41 +00:00 |
|
AArch64SchedM1.td
|
[AArch64] Add new subtarget feature to fuse AES crypto operations
|
2017-02-01 02:54:39 +00:00 |
|
AArch64SchedThunderX2T99.td
|
[AArch64] Vulcan is now ThunderXT99
|
2017-03-07 19:42:40 +00:00 |
|
AArch64SchedThunderX.td
|
[AArch64] Vulcan is now ThunderXT99
|
2017-03-07 19:42:40 +00:00 |
|
AArch64Schedule.td
|
|
|
|
AArch64SelectionDAGInfo.cpp
|
[AArch64] Drive-by cleanup, make this code shorter. NFCI.
|
2017-03-22 23:37:58 +00:00 |
|
AArch64SelectionDAGInfo.h
|
|
|
|
AArch64StorePairSuppress.cpp
|
|
|
|
AArch64Subtarget.cpp
|
Revert r291254: [AArch64] Reduce vector insert/extract cost for Falkor
|
2017-05-24 16:48:39 +00:00 |
|
AArch64Subtarget.h
|
[globalisel][tablegen] Demote OptForSize/OptForMinSize/ForCodeSize to per-function predicates.
|
2017-05-19 11:08:33 +00:00 |
|
AArch64SystemOperands.td
|
AArch64InstPrinter: rewrite of printSysAlias
|
2017-02-27 14:45:34 +00:00 |
|
AArch64TargetMachine.cpp
|
[AArch64][GlobalISel] Add the Localizer pass for the O0 pipeline
|
2017-05-27 01:34:07 +00:00 |
|
AArch64TargetMachine.h
|
[globalisel][tablegen] Move <Target>InstructionSelector declarations to anonymous namespaces
|
2017-04-06 09:49:34 +00:00 |
|
AArch64TargetObjectFile.cpp
|
AArch64: use linker-private symbols for globals in MachO.
|
2017-05-15 21:51:38 +00:00 |
|
AArch64TargetObjectFile.h
|
AArch64: use linker-private symbols for globals in MachO.
|
2017-05-15 21:51:38 +00:00 |
|
AArch64TargetTransformInfo.cpp
|
Re-commit r302678, fixing PR33053.
|
2017-05-16 21:29:22 +00:00 |
|
AArch64TargetTransformInfo.h
|
Re-commit r302678, fixing PR33053.
|
2017-05-16 21:29:22 +00:00 |
|
AArch64VectorByElementOpt.cpp
|
[AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2017-01-25 00:29:26 +00:00 |
|
CMakeLists.txt
|
[AArch64] Remove AArch64AddressTypePromotion pass
|
2017-05-05 16:05:41 +00:00 |
|
LLVMBuild.txt
|
|
|
ea039226e9