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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/CodeGen
Matt Arsenault a385bc21a4 AMDGPU/GlobalISel: Switch test to checking final ISA
The naming convention is for unprefixed .ll tests to check the final
ISA instructions.
2020-04-01 13:03:02 -04:00
..
AArch64 [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object 2020-03-31 14:21:21 -07:00
AMDGPU AMDGPU/GlobalISel: Switch test to checking final ISA 2020-04-01 13:03:02 -04:00
ARC
ARM [ARM] Fix qdadd operand order 2020-03-31 10:11:36 +01:00
AVR [AVR] Generalize the previous interrupt bugfix to signal handlers too 2020-03-31 19:33:34 +13:00
BPF
Generic
Hexagon
Inputs
Lanai
Mips [Mips] Make MipsBranchExpansion aware of BBIT family of branch 2020-03-31 09:20:51 +02:00
MIR
MSP430
NVPTX [DAGCombiner] Require ninf for sqrt recip estimation 2020-04-01 16:23:43 +08:00
PowerPC [NFC] [PowerPC] Add test for frsp elimination 2020-04-01 17:54:24 +08:00
RISCV [LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHG 2020-04-01 15:51:26 +01:00
SPARC
SystemZ [SystemZ] Improve foldMemoryOperandImpl(). 2020-03-31 17:17:51 +02:00
Thumb
Thumb2 [ARM] Extra vmull loop tests. NFC 2020-04-01 14:07:45 +01:00
VE
WebAssembly [WebAssembly] Fix subregion relationship in CFGSort 2020-04-01 08:12:41 -07:00
WinCFGuard
WinEH
X86 [X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X) 2020-04-01 15:10:53 +01:00
XCore