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b53cb9b938
This is the codegen part of fixing: https://bugs.llvm.org/show_bug.cgi?id=32939 Even with the optimal/canonical IR that is ideally created by D65954, we would reverse that transform in DAGCombiner and end up with the same asm on AArch64 or x86. I see 2 options for trying to correct this: 1. Limit isNegatibleForFree() by special-casing the fmul pattern (this patch). 2. Avoid creating (fmul X, 2.0) in the 1st place by adding a special-case transform to SelectionDAG::getNode() and/or SelectionDAGBuilder::visitFMul() that matches the transform done by DAGCombiner. This seems like the less intrusive patch, but if there's some other reason to prefer 1 option over the other, we can change to the other option. Differential Revision: https://reviews.llvm.org/D66016 llvm-svn: 368490
197 lines
6.1 KiB
LLVM
197 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s
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define double @test1(double %a, double %b) {
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; CHECK-LABEL: test1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, -2.000000e+00
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%add1 = fadd double %a, %mul
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ret double %add1
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}
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; DAGCombine will canonicalize 'a - 2.0*b' to 'a + -2.0*b'
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define double @test2(double %a, double %b) {
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; CHECK-LABEL: test2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, 2.000000e+00
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%add1 = fsub double %a, %mul
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ret double %add1
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}
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define double @test3(double %a, double %b, double %c) {
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; CHECK-LABEL: test3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %a, %b
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%mul1 = fmul double %c, 2.000000e+00
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%sub = fsub double %mul, %mul1
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ret double %sub
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}
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define double @test4(double %a, double %b, double %c) {
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; CHECK-LABEL: test4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %a, %b
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%mul1 = fmul double %c, -2.000000e+00
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%add2 = fadd double %mul, %mul1
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ret double %add2
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}
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define <4 x float> @fmulnegtwo_vec(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
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%add = fadd <4 x float> %a, %mul
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_commute(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
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%add = fadd <4 x float> %mul, %a
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_undefs(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec_undefs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float undef, float -2.0, float undef, float -2.0>
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%add = fadd <4 x float> %a, %mul
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_commute_undefs(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec_commute_undefs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float undef, float -2.0, float -2.0>
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%add = fadd <4 x float> %mul, %a
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ret <4 x float> %add
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}
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define <4 x float> @test6(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: test6:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float 2.0, float 2.0, float 2.0, float 2.0>
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%add = fsub <4 x float> %a, %mul
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ret <4 x float> %add
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}
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; Don't fold (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)) if the fmul has
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; multiple uses.
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define double @test7(double %a, double %b) nounwind {
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; CHECK-LABEL: test7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: fmov d2, #-2.00000000
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; CHECK-NEXT: fmul d1, d1, d2
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; CHECK-NEXT: fadd d8, d0, d1
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; CHECK-NEXT: mov v0.16b, v1.16b
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; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
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; CHECK-NEXT: bl use
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; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
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; CHECK-NEXT: mov v0.16b, v8.16b
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; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%mul = fmul double %b, -2.000000e+00
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%add1 = fadd double %a, %mul
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call void @use(double %mul)
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ret double %add1
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}
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define float @fadd_const_multiuse_fmf(float %x) {
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; CHECK-LABEL: fadd_const_multiuse_fmf:
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; CHECK: // %bb.0:
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; CHECK-DAG: mov [[W59:w[0-9]+]], #1114374144
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; CHECK-DAG: mov [[W42:w[0-9]+]], #1109917696
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; CHECK-DAG: fmov [[FP59:s[0-9]+]], [[W59]]
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; CHECK-DAG: fmov [[FP42:s[0-9]+]], [[W42]]
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; CHECK-NEXT: fadd [[TMP1:s[0-9]+]], s0, [[FP42]]
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; CHECK-NEXT: fadd [[TMP2:s[0-9]+]], s0, [[FP59]]
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; CHECK-NEXT: fadd s0, [[TMP1]], [[TMP2]]
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; CHECK-NEXT: ret
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%a1 = fadd float %x, 42.0
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%a2 = fadd nsz reassoc float %a1, 17.0
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%a3 = fadd float %a1, %a2
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ret float %a3
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}
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; DAGCombiner transforms this into: (x + 17.0) + (x + 59.0).
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define float @fadd_const_multiuse_attr(float %x) {
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; CHECK-LABEL: fadd_const_multiuse_attr:
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; CHECK: // %bb.0:
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; CHECK-DAG: mov [[W17:w[0-9]+]], #1109917696
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; CHECK-DAG: mov [[W59:w[0-9]+]], #1114374144
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; CHECK-NEXT: fmov [[FP17:s[0-9]+]], [[W17]]
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; CHECK-NEXT: fmov [[FP59:s[0-9]+]], [[W59]]
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; CHECK-NEXT: fadd [[TMP1:s[0-9]+]], s0, [[FP17]]
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; CHECK-NEXT: fadd [[TMP2:s[0-9]+]], s0, [[FP59]]
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; CHECK-NEXT: fadd s0, [[TMP1]], [[TMP2]]
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; CHECK-NEXT: ret
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%a1 = fadd fast float %x, 42.0
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%a2 = fadd fast float %a1, 17.0
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%a3 = fadd fast float %a1, %a2
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ret float %a3
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}
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; PR32939 - https://bugs.llvm.org/show_bug.cgi?id=32939
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define double @fmul2_negated(double %a, double %b, double %c) {
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; CHECK-LABEL: fmul2_negated:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fmul d1, d1, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, 2.0
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%mul1 = fmul double %mul, %c
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%sub = fsub double %a, %mul1
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ret double %sub
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}
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define <2 x double> @fmul2_negated_vec(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
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; CHECK-LABEL: fmul2_negated_vec:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.2d, v1.2d, v1.2d
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; CHECK-NEXT: fmul v1.2d, v1.2d, v2.2d
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; CHECK-NEXT: fsub v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: ret
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%mul = fmul <2 x double> %b, <double 2.0, double 2.0>
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%mul1 = fmul <2 x double> %mul, %c
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%sub = fsub <2 x double> %a, %mul1
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ret <2 x double> %sub
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}
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declare void @use(double)
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