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158 lines
5.9 KiB
LLVM
158 lines
5.9 KiB
LLVM
; RUN: llc -no-integrated-as -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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; RUN: llc -no-integrated-as -code-model=large -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-LARGE %s
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; RUN: llc -no-integrated-as -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -relocation-model=pic -aarch64-enable-atomic-cfg-tidy=0 -o - %s | FileCheck --check-prefix=CHECK-PIC %s
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; RUN: llc -no-integrated-as -code-model=tiny -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-TINY %s
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define i32 @test_jumptable(i32 %in) {
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; CHECK: test_jumptable
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 4, label %lbl4
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]
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; CHECK-LABEL: test_jumptable:
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; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
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; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI0_0
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; CHECK: adr [[PCBASE:x[0-9]+]], [[JTBASE:.LBB[0-9]+_[0-9]+]]
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; CHECK: ldrb w[[OFFSET:[0-9]+]], [x[[JT]], {{x[0-9]+}}]
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; CHECK: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK: br [[DEST]]
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; CHECK-LARGE: movz x[[JTADDR:[0-9]+]], #:abs_g0_nc:.LJTI0_0
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; CHECK-LARGE: movk x[[JTADDR]], #:abs_g1_nc:.LJTI0_0
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; CHECK-LARGE: movk x[[JTADDR]], #:abs_g2_nc:.LJTI0_0
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; CHECK-LARGE: movk x[[JTADDR]], #:abs_g3:.LJTI0_0
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; CHECK-LARGE: adr [[PCBASE:x[0-9]+]], [[JTBASE:.LBB[0-9]+_[0-9]+]]
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; CHECK-LARGE: ldrb w[[OFFSET:[0-9]+]], [x[[JTADDR]], {{x[0-9]+}}]
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; CHECK-LARGE: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK-LARGE: br [[DEST]]
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; CHECK-PIC-LABEL: test_jumptable:
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; CHECK-PIC: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
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; CHECK-PIC: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI0_0
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; CHECK-PIC: adr [[PCBASE:x[0-9]+]], [[JTBASE:.LBB[0-9]+_[0-9]+]]
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; CHECK-PIC: ldrb w[[OFFSET:[0-9]+]], [x[[JT]], {{x[0-9]+}}]
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; CHECK-PIC: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK-PIC: br [[DEST]]
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; CHECK-IOS: adrp [[JTPAGE:x[0-9]+]], LJTI0_0@PAGE
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; CHECK-IOS: add x[[JT:[0-9]+]], [[JTPAGE]], LJTI0_0@PAGEOFF
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; CHECK-IOS: adr [[PCBASE:x[0-9]+]], [[JTBASE:LBB[0-9]+_[0-9]+]]
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; CHECK-IOS: ldrb w[[OFFSET:[0-9]+]], [x[[JT]], {{x[0-9]+}}]
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; CHECK-IOS: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK-IOS: br [[DEST]]
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; CHECK-TINY-LABEL: test_jumptable:
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; CHECK-TINY: adr x[[JT:[0-9]+]], .LJTI0_0
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; CHECK-TINY: adr [[PCBASE:x[0-9]+]], [[JTBASE:.LBB[0-9]+_[0-9]+]]
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; CHECK-TINY: ldrb w[[OFFSET:[0-9]+]], [x[[JT]], {{x[0-9]+}}]
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; CHECK-TINY: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK-TINY: br [[DEST]]
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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; CHECK: .rodata
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; CHECK: .LJTI0_0:
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; CHECK-NEXT: .byte ([[JTBASE]]-[[JTBASE]])>>2
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; CHECK-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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define i32 @test_jumptable16(i32 %in) {
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 4, label %lbl4
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]
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; CHECK-LABEL: test_jumptable16:
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; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI1_0
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; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI1_0
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; CHECK: adr [[PCBASE:x[0-9]+]], [[JTBASE:.LBB[0-9]+_[0-9]+]]
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; CHECK: ldrh w[[OFFSET:[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #1]
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; CHECK: add [[DEST:x[0-9]+]], [[PCBASE]], x[[OFFSET]], lsl #2
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; CHECK: br [[DEST]]
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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call void asm sideeffect "1;2;3;4;5;6;7;8;9;10;11;12;13;14;15;16", ""()
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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; CHECK: .rodata
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; CHECK: .p2align 1
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; CHECK: .LJTI1_0:
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; CHECK-NEXT: .hword ([[JTBASE]]-[[JTBASE]])>>2
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; CHECK-NEXT: .hword (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-NEXT: .hword (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-NEXT: .hword (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-NEXT: .hword (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-PIC-NOT: .data_region
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; CHECK-PIC-NOT: .LJTI0_0
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; CHECK-PIC: .LJTI0_0:
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; CHECK-PIC-NEXT: .byte ([[JTBASE]]-[[JTBASE]])>>2
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; CHECK-PIC-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-PIC-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-PIC-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-PIC-NEXT: .byte (.LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-PIC-NOT: .end_data_region
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; CHECK-IOS: .section __TEXT,__const
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; CHECK-IOS-NOT: .data_region
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; CHECK-IOS: LJTI0_0:
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; CHECK-IOS-NEXT: .byte ([[JTBASE]]-[[JTBASE]])>>2
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; CHECK-IOS-NEXT: .byte (LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-IOS-NEXT: .byte (LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-IOS-NEXT: .byte (LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-IOS-NEXT: .byte (LBB{{.*}}-[[JTBASE]])>>2
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; CHECK-IOS-NOT: .end_data_region
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