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3c233e1b36
This patch also fixes up a number of cases in DAGCombine and SelectionDAGBuilder where the size of a scalable vector is used in a fixed-width context (thus triggering an assertion failure). Reviewers: efriedma, c-rhodes, rovka, cameron.mcinally Reviewed By: efriedma Tags: #llvm Differential Revision: https://reviews.llvm.org/D71215
190 lines
6.5 KiB
LLVM
190 lines
6.5 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve < %s | FileCheck %s
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; This file checks that unpredicated load/store instructions to locals
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; use the right instructions and offsets.
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; Data fills
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define void @fill_nxv16i8() {
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; CHECK-LABEL: fill_nxv16i8
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; CHECK-DAG: ld1b { z{{[01]}}.b }, p0/z, [sp]
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; CHECK-DAG: ld1b { z{{[01]}}.b }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 16 x i8>
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%local1 = alloca <vscale x 16 x i8>
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load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %local0
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load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %local1
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ret void
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}
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define void @fill_nxv8i16() {
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; CHECK-LABEL: fill_nxv8i16
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp]
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i16>
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%local1 = alloca <vscale x 8 x i16>
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load volatile <vscale x 8 x i16>, <vscale x 8 x i16>* %local0
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load volatile <vscale x 8 x i16>, <vscale x 8 x i16>* %local1
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ret void
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}
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define void @fill_nxv4i32() {
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; CHECK-LABEL: fill_nxv4i32
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; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp]
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; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i32>
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%local1 = alloca <vscale x 4 x i32>
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load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %local0
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load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %local1
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ret void
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}
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define void @fill_nxv2i64() {
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; CHECK-LABEL: fill_nxv2i64
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; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp]
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; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i64>
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%local1 = alloca <vscale x 2 x i64>
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load volatile <vscale x 2 x i64>, <vscale x 2 x i64>* %local0
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load volatile <vscale x 2 x i64>, <vscale x 2 x i64>* %local1
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ret void
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}
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; Data spills
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define void @spill_nxv16i8(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1) {
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; CHECK-LABEL: spill_nxv16i8
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; CHECK-DAG: st1b { z{{[01]}}.b }, p0, [sp]
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; CHECK-DAG: st1b { z{{[01]}}.b }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 16 x i8>
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%local1 = alloca <vscale x 16 x i8>
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store volatile <vscale x 16 x i8> %v0, <vscale x 16 x i8>* %local0
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store volatile <vscale x 16 x i8> %v1, <vscale x 16 x i8>* %local1
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ret void
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}
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define void @spill_nxv8i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1) {
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; CHECK-LABEL: spill_nxv8i16
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp]
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i16>
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%local1 = alloca <vscale x 8 x i16>
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store volatile <vscale x 8 x i16> %v0, <vscale x 8 x i16>* %local0
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store volatile <vscale x 8 x i16> %v1, <vscale x 8 x i16>* %local1
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ret void
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}
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define void @spill_nxv4i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1) {
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; CHECK-LABEL: spill_nxv4i32
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; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp]
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; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i32>
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%local1 = alloca <vscale x 4 x i32>
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store volatile <vscale x 4 x i32> %v0, <vscale x 4 x i32>* %local0
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store volatile <vscale x 4 x i32> %v1, <vscale x 4 x i32>* %local1
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ret void
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}
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define void @spill_nxv2i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1) {
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; CHECK-LABEL: spill_nxv2i64
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; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp]
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; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i64>
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%local1 = alloca <vscale x 2 x i64>
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store volatile <vscale x 2 x i64> %v0, <vscale x 2 x i64>* %local0
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store volatile <vscale x 2 x i64> %v1, <vscale x 2 x i64>* %local1
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ret void
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}
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; Predicate fills
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define void @fill_nxv16i1() {
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; CHECK-LABEL: fill_nxv16i1
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; CHECK-DAG: ldr p{{[01]}}, [sp, #8, mul vl]
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; CHECK-DAG: ldr p{{[01]}}, [sp]
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%local0 = alloca <vscale x 16 x i1>
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%local1 = alloca <vscale x 16 x i1>
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load volatile <vscale x 16 x i1>, <vscale x 16 x i1>* %local0
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load volatile <vscale x 16 x i1>, <vscale x 16 x i1>* %local1
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ret void
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}
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define void @fill_nxv8i1() {
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; CHECK-LABEL: fill_nxv8i1
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; CHECK-DAG: ldr p{{[01]}}, [sp, #4, mul vl]
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; CHECK-DAG: ldr p{{[01]}}, [sp]
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%local0 = alloca <vscale x 8 x i1>
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%local1 = alloca <vscale x 8 x i1>
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load volatile <vscale x 8 x i1>, <vscale x 8 x i1>* %local0
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load volatile <vscale x 8 x i1>, <vscale x 8 x i1>* %local1
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ret void
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}
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define void @fill_nxv4i1() {
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; CHECK-LABEL: fill_nxv4i1
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; CHECK-DAG: ldr p{{[01]}}, [sp, #6, mul vl]
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; CHECK-DAG: ldr p{{[01]}}, [sp, #4, mul vl]
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%local0 = alloca <vscale x 4 x i1>
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%local1 = alloca <vscale x 4 x i1>
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load volatile <vscale x 4 x i1>, <vscale x 4 x i1>* %local0
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load volatile <vscale x 4 x i1>, <vscale x 4 x i1>* %local1
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ret void
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}
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define void @fill_nxv2i1() {
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; CHECK-LABEL: fill_nxv2i1
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; CHECK-DAG: ldr p{{[01]}}, [sp, #7, mul vl]
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; CHECK-DAG: ldr p{{[01]}}, [sp, #6, mul vl]
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%local0 = alloca <vscale x 2 x i1>
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%local1 = alloca <vscale x 2 x i1>
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load volatile <vscale x 2 x i1>, <vscale x 2 x i1>* %local0
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load volatile <vscale x 2 x i1>, <vscale x 2 x i1>* %local1
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ret void
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}
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; Predicate spills
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define void @spill_nxv16i1(<vscale x 16 x i1> %v0, <vscale x 16 x i1> %v1) {
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; CHECK-LABEL: spill_nxv16i1
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; CHECK-DAG: str p{{[01]}}, [sp, #8, mul vl]
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; CHECK-DAG: str p{{[01]}}, [sp]
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%local0 = alloca <vscale x 16 x i1>
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%local1 = alloca <vscale x 16 x i1>
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store volatile <vscale x 16 x i1> %v0, <vscale x 16 x i1>* %local0
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store volatile <vscale x 16 x i1> %v1, <vscale x 16 x i1>* %local1
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ret void
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}
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define void @spill_nxv8i1(<vscale x 8 x i1> %v0, <vscale x 8 x i1> %v1) {
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; CHECK-LABEL: spill_nxv8i1
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; CHECK-DAG: str p{{[01]}}, [sp, #4, mul vl]
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; CHECK-DAG: str p{{[01]}}, [sp]
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%local0 = alloca <vscale x 8 x i1>
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%local1 = alloca <vscale x 8 x i1>
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store volatile <vscale x 8 x i1> %v0, <vscale x 8 x i1>* %local0
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store volatile <vscale x 8 x i1> %v1, <vscale x 8 x i1>* %local1
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ret void
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}
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define void @spill_nxv4i1(<vscale x 4 x i1> %v0, <vscale x 4 x i1> %v1) {
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; CHECK-LABEL: spill_nxv4i1
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; CHECK-DAG: str p{{[01]}}, [sp, #6, mul vl]
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; CHECK-DAG: str p{{[01]}}, [sp, #4, mul vl]
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%local0 = alloca <vscale x 4 x i1>
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%local1 = alloca <vscale x 4 x i1>
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store volatile <vscale x 4 x i1> %v0, <vscale x 4 x i1>* %local0
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store volatile <vscale x 4 x i1> %v1, <vscale x 4 x i1>* %local1
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ret void
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}
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define void @spill_nxv2i1(<vscale x 2 x i1> %v0, <vscale x 2 x i1> %v1) {
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; CHECK-LABEL: spill_nxv2i1
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; CHECK-DAG: str p{{[01]}}, [sp, #7, mul vl]
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; CHECK-DAG: str p{{[01]}}, [sp, #6, mul vl]
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%local0 = alloca <vscale x 2 x i1>
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%local1 = alloca <vscale x 2 x i1>
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store volatile <vscale x 2 x i1> %v0, <vscale x 2 x i1>* %local0
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store volatile <vscale x 2 x i1> %v1, <vscale x 2 x i1>* %local1
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ret void
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}
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